An etched planarized VCSEL includes: an active region; a blocking region over the active region, and defining apertures therein; and conductive channel cores in the apertures, wherein the conductive channel cores and blocking region form an isolation region. A method of making the VCSEL includes: forming the active region; forming the blocking region over the active region; etching the apertures in the blocking region; and forming the conductive channel cores in the apertures of the blocking region. Another etched planarized VCSEL includes: an active region; a conductive region over the active region, and defining apertures therein; and blocking cores in the apertures, wherein the blocking cores and conductive region form an isolation region. A method of making the VCSEL includes: forming the active region; forming the conductive region over the active region; etching the apertures in the conductive region; and forming the blocking cores in the apertures of the conductive region.

A semiconductor laser diode is specified, comprising a semiconductor layer sequence (1) with semiconductor layers applied vertically one above another with an active layer (11), which emits laser radiation via a radiation coupling-out surface during operation, wherein the radiation coupling-out surface is formed by a side surface of the semiconductor layer sequence (1), and a heat barrier layer (2) and a metallic contact layer (5) laterally adjacent to one another on a main surface (12) of the semiconductor layer sequence (1), wherein the heat barrier layer (2) is formed by an electrically insulating porous material (9). As a result, the heat arising during operation is conducted via the p-type electrode (5) to a heat sink (20) and the formation of a two-dimensional temperature gradient is avoided. A thermal lens in the edge emitter is thus counteracted. Furthermore, a method for producing a semiconductor laser diode and a semiconductor laser diode arrangement are specified.

A wavelength tunable laser includes: a heating layer, a dielectric layer, reflectors, a transport layer, a support layer, and a substrate layer. The heating layer is located above the transport layer; the transport layer is located above the support layer, and the transport layer includes an upper cladding layer, a waveguide layer, and a lower cladding layer from top to bottom; the reflector is located in the transport layer; the support layer has a protection structure, where the protection structure forms a hollow structure together with the transport layer and the substrate layer, and the hollow structure has a support structure; and the substrate layer is located below the support layer. The heating layer, the reflector, and a part of the transport layer form a suspended structure to prevent heat dissipation. Thus thermal tuning efficiency can be improved, and power consumption can be lowered.

An aluminium gallium indium phosphide (AlGaInP)-based semiconductor laser device is provided. On a main surface of a semiconductor substrate formed of n-type GaAs (gallium arsenide), from the bottom layer, an n-type buffer layer, an n-type cladding layer formed of an AlGaInP-based semiconductor containing silicon (Si) as a dopant, an active layer, a p-type cladding layer formed of an AlGaInP-based semiconductor containing magnesium (Mg) or zinc (Zn) as a dopant, an etching stopper layer, and a p-type contact layer are formed. Here, when an Al composition ratio x of the AlGaInP-based semiconductor is taken as a composition ratio of Al and Ga defined as (Al.sub.xGa.sub.1-x).sub.0.5In.sub.0.5P, a composition of the n-type cladding layer is expressed as (Al.sub.xnGa.sub.1-xn).sub.0.5In.sub.0.5P (0.9<xn<1) and a composition of the p-type cladding layer is expressed as (Al.sub.xpGa.sub.1-xp).sub.0.5In.sub.0.5P (0.9<xp1), and xn and xp satisfy a relationship of xn<xp.

A photonic integrated device (PID) for generating single and multiple wavelength optical signals is provided. The PID includes first and second reflective structures having first and second predetermined reflectivities, respectively. A common waveguide is optically coupled to the first reflective structure, and at least one semiconductor waveguide is optically coupled to the second reflective structure. The PID further includes at least one active gain region that is disposed between the first and second reflective structures. In various embodiments, the PID includes at least one of a dielectric waveguide based wavelength dependent element and a dielectric Bragg stack.

An exemplary embodiment of the present invention relates to a method of fabricating at least one radiation emitter comprising the steps of depositing an etch stop layer on a top side of a substrate; depositing a layer stack on the etch stop layer, said layer stack comprising a first contact layer, a first reflector, an active region, a second reflector, and a second contact layer; locally removing the layer stack and the etch stop layer, and thereby forming at least one mesa, said at least one mesa comprising an unremoved section of the etch stop layer and a layered pillar which forms a vertical cavity laser structure based on the unremoved layer stack inside the at least one mesa; depositing a protection material on the top side of the substrate and thereby embedding the entire mesa in the protection material wherein the backside of the substrate remains unprotected; removing the substrate by applying at least one etching chemical that is capable of etching the substrate but incapable or less capable of etching the etch stop layer and the protection material; and removing the etch stop layer and thereby exposing the first contact layer of the at least one layered pillar.

A vertical cavity surface emitting laser includes an active area, an inner trench, an outer trench, and a first implantation region. The active area includes a first mirror, an active region, a second mirror, and an etch stop layer. The first mirror is formed over a substrate. The active region is formed over the first mirror. The second mirror is formed over the active region. The etch stop layer with an aperture is formed between the active region and the second mirror. The inner trench surrounds the active area in a top view. The outer trench is formed beside the inner trench. The first implantation region is formed below the inner trench.

The present invention provides a semiconductor laser device for improving temperature characteristics of waveguide structures and realizing stable light emitting patterns and high output, and a method for making the same. The semiconductor laser device (1) comprises: an n-type clad layer (5) laminated on a substrate (2); an active layer (6) laminated on the n-type clad layer (5); a p-type clad layer (7) laminated on the active layer (6); and a plurality of waveguide structures (8) formed on the p-type clad layer (7) and having a ridge of a horn shape in top view. In this configuration, a divider (29) is formed between adjacent waveguide structures (8), and the divider (29) comprises: a groove (30) dividing the active layer (6); and a heat dissipation material (34) filled in the groove (30) and having a thermal conductivity higher than a thermal conductivity of a semiconductor layer (4).

A vertical cavity surface emitter device (e.g., VCSEL or RC-LED) containing a buried index-guiding current confinement aperture layer which is grown, and lithographically processed to define position, shape and dimension of an inner aperture. In a regrowth process, the aperture is filled with a single crystalline material from the third contact layer. The aperture provides for both current and optical confinement, while allowing for higher optical power output and improved thermal conductivity.

A non-planarized VCSEL can include: a blocking region over or under an active region, the blocking region having a first thickness; one or more conductive channel cores in the blocking region, the one or more conductive channel cores having a second thickness that is larger than the first thickness, wherein the blocking region is defined by having an implant and the one or more conductive channel cores are devoid of the implant, wherein the blocking region is lateral the one or more conductive channel cores, the blocking region and one or more conductive channel cores being an isolation region; and a non-planarized semiconductor region of one or more non-planarized semiconductor layers over the isolation region. The VCSEL can include a planarized bottom mirror region below the active region and a non-planarized top mirror region above the isolation region, or a non-planarized bottom mirror region below the active region.