Patent classifications
H01S5/2275
LASER CHIP FOR FLIP-CHIP BONDING ON SILICON PHOTONICS CHIPS
A laser chip for flip-chip bonding on a silicon photonics chip with passive alignment features. The laser chip includes a chip body made of a p-region and a n-region in vertical direction and extended from a front facet to a rear facet in longitudinal direction, a pair of first vertical stoppers formed respectively beyond two sides of the chip body based on a wider width of the n-region, an active region buried in the chip body between the p-region and the n-region in the vertical direction and extended from the front facet to the rear facet in the longitudinal direction, an alignment mark formed on a top surface of the p-region near the front facet with a lateral distance defined in sub-micron precision relative to the active region; and a thin metal film on the surface of the p-region having a cleaved edge shared with the front facet.
SEMICONDUCTOR LASER DIODE DEVICE AND MANUFACTURING METHOD THEREOF
The present disclosure provides fabrication of a laser diode with reliability at a high temperature of 80° C. or more in a high-power single mode by a process of thinly growing a second upper clad (P clad) layer at 1 μm or less in primary growth, appropriately controlling an upper portion Wt to 1.5 μm or more and a lower portion Wb to 4.0 μm or less of the wave guide, and then compensating for a second upper clad layer to 0.5 μm or more in regrowth, in order to compensate for disadvantages of a high-power and high-reliability laser diode device with a thick second upper clad layer (P clad). A second upper clad regrowth layer is applied to reduce internal resistance and voltage and reduce heat generated in the device to increase a Kink and a COD power, thereby improving the performance of a high-power and high-reliability laser diode.
CASCADE LASERS
A quantum cascade laser or interband cascade laser for outputting a frequency comb. The laser's active waveguide comprises a combination of narrow and wide sections which are engineered in combination such that the laser is operable to produce lasing only in the fundamental mode across the operating wavelength range, the narrow section squeezing light propagating in the waveguide to output a frequency comb via four-wave mixing. The narrow and wide sections are further engineered to reduce the waveguide's net GVD, and also to reduce the GVD variation across the operating range compared to a comparable waveguide that is of constant width, thus producing a more stable frequency comb. The proportion of the laser's full dynamic range (i.e. from threshold to the rollover current where the maximum output power is achieved) over which lasing remains in the frequency comb regime is thereby increased compared with a constant width single mode waveguide.
Semiconductor Laser
A semiconductor laser includes an active region, a first distributed-Bragg-reflector region disposed contiguously with the active region, and a second distributed-Bragg-reflector region. The first distributed-Bragg-reflector region is formed contiguously with one side of the active region in a waveguide direction and includes a first diffraction grating. The second distributed-Bragg-reflector region is formed contiguously with to the other side of the active region in the waveguide direction and includes a second diffraction grating. The first diffraction grating includes recessed portions formed through a diffraction grating layer formed in the first distributed-Bragg-reflector region and convex portions adjacent to the recessed portions. The diffraction grating layer is made of a dielectric material.
Semiconductor optical element and semiconductor optical device comprising the same
A semiconductor optical element is configured to emit or absorb light and includes a lower structure that includes a multiple quantum well layer; an upper mesa structure that is disposed on the lower structure; a current injection structure that is disposed on the upper mesa structure, when seen from an optical axis of the emitted or absorbed light, a width of a portion of the current injection structure in contact with the upper mesa structure is smaller than a width of the upper mesa structure, the portion of the current injection structure in contact with the upper mesa structure consisting of InP, and an average refractive index of the upper mesa structure is higher than a refractive index of the InP forming the current injection structure; and an insulating film covering both side surfaces of the upper mesa structure and a part of an upper surface of the upper mesa structure.
LASER ELEMENT AND METHOD FOR PRODUCING SAME
Provided are a laser element and a method for manufacturing the same, in which the laser element includes a first clad layer, an optical waveguide disposed on the first clad layer, a second clad layer disposed on the optical waveguide, a first electrode disposed on the second clad layer, and a dummy clad disposed on the optical waveguide and apart from the second clad layer and the first electrode.
OPTOELECTRONIC DEVICE AND METHOD OF MANUFACTURE THEREOF
A method of fabricating an optoelectronic component, performed on a multi-layered wafer disposed on a substrate. The method comprises the steps of: etching the multi-layered wafer, thereby defining a slab and a multi-layered ridge, the slab having an upper surface below the ridge and being located between the multi-layered ridge and the substrate; selectively epitaxially growing a III-V semiconductor cladding adjacent to a first and second sidewall of the ridge, the cladding layer extending from the upper surface of the slab along the first and second sidewalls, and thereby cladding an optically active waveguide within the multi-layered ridge; and providing a first and second electrical contact, which electrically connect to a layer of the multi-layered ridge and the slab respectively.
Gallium and nitrogen containing laser device configured on a patterned substrate
A gallium and nitrogen containing laser diode device. The device has a gallium and nitrogen containing substrate material comprising a surface region. The surface region is configured on either a non-polar crystal orientation or a semi-polar crystal orientation. The device has a recessed region formed within a second region of the substrate material, the second region being between a first region and a third region. The recessed region is configured to block a plurality of defects from migrating from the first region to the third region. The device has an epitaxially formed gallium and nitrogen containing region formed overlying the third region. The epitaxially formed gallium and nitrogen containing region is substantially free from defects migrating from the first region and an active region formed overlying the third region.
SEMICONDUCTOR OPTICAL DEVICE AND OPTICAL TRANSCEIVER MODULE
The upper surface of the semiconductor substrate has a slope descending from the projection in the second direction at an angle of 0-12° to a horizontal plane. The mesa stripe structure has an inclined surface with a slope ascending from the upper surface of the semiconductor substrate at an angle of 45-55° to the horizontal plane, the mesa stripe structure having an upright surface rising from the inclined surface at an angle of 85-95° to the horizontal plane. The buried layer is made from semiconductor with ruthenium doped therein and is in contact with the inclined surface and the upright surface. The inclined surface is as high as 80% or less of height from the upper surface of the semiconductor substrate to a lower surface of the quantum well layer and is as high as 0.3 μm or more.
OPTICAL SEMICONDUCTOR INTEGRATED ELEMENT
Provided here are: a laser diode section provided on a surface of an n-type InP substrate; a spot-size converter section provided on a surface of the n-type InP substrate, the spot-size converter section being composed of a core layer which causes emitted laser light to propagate therein, a p-type InP cladding layer on a front surface side of the core layer, an n-type InP cladding layer—on a back surface side of the core layer, n-type InP cladding layers provided on the both sides of the core layer, and a p-type InP cladding layer provided on respective surfaces of the p-type InP cladding layer and the first cladding layers; a window region provided on a surface of the n-type InP substrate-that is placed on a front-end side of the core layer; and a monitor PD as a monitor section provided on a surface of the window region.