A flying capacitor switching cell-system includes at least two flying capacitor switching cells, wherein each of the cells comprises an arrangement of at least one semiconductor system, and wherein the cells are in parallel in an electrical circuit.

An exemplary system includes an inverter coupled to a DC source, eight power switches and three DC-link capacitors that synthesize seven output voltage levels. In one example the inverter includes a four-level active neutral pointed clamped inverter (4L-ANCP) that includes six power switches of the eight power switches is operated at a switching frequency with a first voltage stress level, and a half-bridge that includes the other two of the eight power switches is coupled to the 4L-ANCP and operated at a fundamental frequency with a second voltage stress, the second voltage stress being higher than the first voltage stress level.

A transformer arrangement is provided. The transformer arrangement includes a transformer with a primary and a secondary winding and a chain link of switching blocks connected in series between one of the windings and a load, where the switching blocks comprise a first set of voltage contribution blocks and a second set of circuit breaker blocks, where the first set of voltage contribution blocks is configured to adjust a voltage output by the transformer with an offset voltage and the second set of circuit breaker blocks is configured to interrupt a current running through the chain link.

A method can be used to synchronize time between nodes of a converter device for high voltage power conversion. The method is performed in a first node of the converter device and includes receiving a time reference from a second node of the converter device, obtaining a delay value for receiving time references from the second node, determining a compensated time by adding the delay value to the time reference, and setting a clock in the first node to be the compensated time.

A method can be used to synchronize time between nodes of a converter device for high voltage power conversion. The method is performed in a first node of the converter device and includes receiving a time reference from a second node of the converter device, obtaining a delay value for receiving time references from the second node, determining a compensated time by adding the delay value to the time reference, and setting a clock in the first node to be the compensated time.

Accordingly, the embodiments herein provide a hybrid modular multilevel converter. The hybrid modular multilevel converter includes one or more chain links, one or more high voltage switches and a plurality of inductors. The one or more chain links are formed by sub modules. The one or more high voltage switches are formed by semi-controlled devices or fully controlled or any other suitable semiconductor devices. The plurality of inductors are arranged in the one or more chain links to limit circulating current among the one or more chain links. The one or more chain links are configured to enhance a power handling capability of the hybrid modular multilevel converter.

Accordingly, the embodiments herein provide a hybrid modular multilevel converter. The hybrid modular multilevel converter includes one or more chain links, one or more high voltage switches and a plurality of inductors. The one or more chain links are formed by sub modules. The one or more high voltage switches are formed by semi-controlled devices or fully controlled or any other suitable semiconductor devices. The plurality of inductors are arranged in the one or more chain links to limit circulating current among the one or more chain links. The one or more chain links are configured to enhance a power handling capability of the hybrid modular multilevel converter.

A power converter to be tested is supplied with arm current from a hysteresis converter in a state in which it is connected to an auxiliary converter through a line. In the power converter and the auxiliary converter, a circulation operation is performed in which a current path bypassing power storage elements is formed between an output terminal of the power converter and an output terminal of the auxiliary converter, after the start of output of arm current in accordance with a reference current command value in which an AC component and a DC component are superimposed, until a DC component of arm current reaches a predetermined level. After execution of the circulation operation, in the power converter and the auxiliary converter, voltage control of the power storage elements and the output terminals is started.

A power converter to be tested is supplied with arm current from a hysteresis converter in a state in which it is connected to an auxiliary converter through a line. In the power converter and the auxiliary converter, a circulation operation is performed in which a current path bypassing power storage elements is formed between an output terminal of the power converter and an output terminal of the auxiliary converter, after the start of output of arm current in accordance with a reference current command value in which an AC component and a DC component are superimposed, until a DC component of arm current reaches a predetermined level. After execution of the circulation operation, in the power converter and the auxiliary converter, voltage control of the power storage elements and the output terminals is started.

Described herein is a multi-level power convertor and a method for a multi-level power convertor. The multi-level power convertor includes a DC port; an AC port; a first power converting unit, a second power converting unit, a coupling inductor, and an inductive filtering unit. The first power converting unit is coupled to the DC port and includes a first AC terminal adapted to provide a first plurality of voltage levels. The second power converting unit is coupled to the DC port and includes a second AC terminal adapted to provide a second plurality of voltage levels, where the second plurality of voltage levels are phase-shifted by 90 degrees with respect to the first plurality of voltage levels. The coupling inductor includes first and second windings with a same number of turns. The inductive filtering unit is arranged between the AC port and ends of the first and second windings.