A system includes a data path and a phase-locked loop (PLL) coupled to the data path. The system also includes a voltage-controlled oscillator (VCO) coupled to the PLL. The VCO includes an LC circuit with first and second differential output terminals. The VCO also includes a first resistor coupled between the first differential output terminal and drain terminals of a first pair of complementary metal-oxide semiconductor (CMOS) transistors. The VCO also includes a second resistor coupled between the second differential output terminal and drain terminals of a second pair of CMOS transistors.

Disclosed examples include a radar system that operates in a first mode and a second mode. In the first mode, the system detects the presence of an object within a threshold range. In response to detection of the presence of the object, the system transitions to the second mode, and the system generates range data, velocity data, and angle data of the object in the second mode. When the object is no longer detected within the threshold range, the system transitions back to the first mode.

Provided is an oscillation apparatus and an oscillation control apparatus including a first control section that generates a first control signal that controls an oscillation frequency of an oscillator, based on a temperature detection result of a temperature detecting section; an encoder that generates a feedback signal; a second control section that generates a second control signal that controls the oscillation frequency of the oscillator, based on the temperature detection result of the temperature detecting section, an external input signal input from outside, and the feedback signal; an oscillation circuit that sets the oscillation frequency of the oscillator, based on the first control signal and the second control signal; and a reference voltage generating section that generates a reference voltage, wherein the encoder generates the feedback signal by comparing the second control signal and the reference voltage.

A method and system are provided for reducing mismatch between oscillators in an LC VCO array. In an implementation, a method comprises measuring the mismatch between the driver strengths, by measuring the corresponding oscillation amplitudes, and a mismatch between the resonance frequency of each LC VCO in the array of VCOs, and adjusting each LC VCO to reduce the measured amplitude and frequency mismatches. In an implementation, the measuring and adjusting is performed once to calibrate the array of VCOs. In another implementation, the system measures and adjusts the array of VCOs repeatedly. In another implementation, the LC VCO array has a master VCO and a plurality of slave VCOs connected to the master VCO by slave PLLs to reduce phase noise caused by mismatches.

A dual-band voltage controlled oscillator (VCO) includes: a first oscillator circuit including a first inductor; a second oscillator circuit including a second inductor; a first mode switch configured to electrically connect or disconnect a first output terminal of the first oscillator circuit and a first output terminal of the second oscillator circuit; a second mode switch configured to electrically connect or disconnect a second output terminal of the first oscillator circuit and a second output terminal of the second oscillator circuit; a third mode switch configured to electrically connect or disconnect a first terminal of the first inductor and a first terminal of the second inductor; and a fourth mode switch configured to electrically connect or disconnect a second terminal of the first inductor and a second terminal of the second inductor.

A reconfigurable, digital phase-locked loop integrated circuit is disclosed which is coupleable to a reference frequency generator. A representative embodiment may include a memory storing a plurality of configuration parameters, at least one configuration parameter of specifying an output frequency; a reconfigurable frequency and delay generator configurable and reconfigurable in response to the configuration parameters to generate an output signal having the output frequency; and a digital controller adapted to access the memory and retrieve the plurality of configuration parameters, and to generate a plurality of control signals to the reconfigurable frequency and delay generator both to generate the output signal having the output frequency in response to the plurality of configuration parameters, and to match a phase of the output signal to an input signal phase.

The apparatus comprises a first coupler configured to receive two output signals, having 180° phase difference, outputted from a first differential generator as two input signals, and output a first voltage signal generated by adding the two input signals and a second voltage signal corresponding to subtraction of the two input signals, a second coupler configured to receive two output signals, having 180° phase difference, outputted from a second differential generator as two input signals, and output a third voltage signal generated by adding the two input signals and a fourth voltage signal corresponding to subtraction of the two input signals, a coupling network connected to the first differential generator and the second differential generator and a third coupler configured to output a signal generated by adding the voltage signal outputted from the first coupler and corresponding voltage signal outputted from the second coupler.

A voltage-controlled oscillator, including a voltage-controlled LC resonator including at least one first output node; an amplifier including at least one first dual-gate MOS transistor including first and second gates, coupling the first output node to a second node of application of a reference potential; and a regulation circuit capable of applying to the second gate of the first transistor a bias voltage variable according to the amplitude of the oscillations of a signal delivered on the first output node of the oscillator.

Techniques are disclosed implementing a tunable transformer with additional taps in at least one of the three coils. The tunable transformer enables the resonant frequency within RF transceiver matching networks to be adjusted without substantially impacting the output power at resonance. The tunability of the transformer is partially driven by the insertion of additional coils within the transformer, which are selectively switched and may be further coupled with a tunable capacitance. The tunability of the transformer is further driven via the use of at least one multi-tap transformer coil, which allows electronic components to be coupled to different coil taps to thereby facilitate an adjustable DC inductance. Doing so counteracts changes in mutual inductance between the non-switched coils, and facilitates the stabilization of output power with shifts in resonant frequency.

A frequency doubler (tripler, or quadrupler) employs current re-use coupled oscillator technique to enhance phase noise without increasing current consumption. Frequency doubler uses coupling between two oscillators running at different frequencies; a first oscillator is running at the target frequency and a second oscillator is running at half the frequency. The coupling between the two oscillators is via a transformer having a primary transformer coil and a secondary transformer coil. The first oscillator comprises a differential inductor, coarse/fine tuning capacitor arrays, and an n-type trans-conductor (GM). A virtual ground node of the n-type GM is coupled to one side of the primary transformer coil and the other side of the primary coil is coupled to the center tap of the secondary coil. The second oscillator comprises the secondary coil, coarse/fine tuning capacitor arrays, n-type GM, frequency tracking loop (FTL) and 2.sup.nd-harmonic LC filter network.