Patent classifications
H03B5/124
Valley detection for supply voltage modulation in power amplifier circuits
Techniques are described for using valley detection for supply voltage modulation in power amplifier circuits. Embodiments operate in context of a power amplifier circuit configured to be driven by a supply voltage generated by a supply modulator and to receive an amplitude-modulated (AM) signal at its input. The output of the power amplifier circuit can be fed to a valley detector that can detect a valley level corresponding to the bottom of the envelope of the AM signal. The detected valley level can be fed back to the supply modulator and compared to a constant reference. In response to the comparison, the supply modulator can vary the supply voltage to the power amplifier circuit in a manner that effectively tracking the envelope of the power amplifier circuit's output signal, thereby effectively seeking a flat valley for the output signal's envelope.
DIGITAL CONTROL OF A VOLTAGE CONTROLLED OSCILLATOR FREQUENCY
A capacitance of a digitally controlled circuit coupled to a first multiplexer (MUX) having a first switch coupled between a first input and a first output, a first pullup device coupled between VDD and the first output, and a first pulldown device coupled between the first output and VSS is controlled. For falling slope of the first output, in a first phase, which is before the falling slope of the first output, turning ON the first switch, and turning OFF the first pullup device. In a second phase, which is during the falling slope of the first output, the first input is coupled to an output of a digital to analog converter coupled to the MUX. In a third phase, which is after the falling slope of the first output, the first switch is turned OFF and the first pulldown device is turned ON.
LOCAL OSCILLATOR
A local oscillator of the present invention includes: a frequency generator for outputting first and second sinusoidal signals having the same frequency but mutually different phases; a phase detector for outputting either a positive or a negative voltage depending on whether a phase difference between the first and second sinusoidal signals output from the frequency generator is greater than a reference phase difference; and a comparator for outputting a comparison result between a voltage output from the phase detector and a reference voltage, or a comparison result between the voltage output from the phase detector and a voltage obtained by inverting the polarity of the voltage, in which the frequency generator controls the phase of the first sinusoidal signal so that the phase difference approaches the reference phase difference by using the comparison result output from the comparator, enabling generating IQ signals having higher phase accuracy than conventional local oscillators.
Circuits for digital and analog controlled oscillators
A circuit may comprise a first node, a ring oscillator, a regulator, and a Kvcc compensation circuit. The first node may be a supply node to provide a supply voltage for the circuit. The ring oscillator may be formed from inverters. The regulator may use a single transistor between the first node and a second node for powering the oscillator. The K compensation circuit may be used to provide to the oscillator a variable capacitive load that is dependent on the supply at the first supply node, and it may drag oscillator frequency down when the first node supply goes up.
Digital control of a voltage controlled oscillator frequency
A capacitance of a digitally controlled circuit coupled to a first multiplexer (MUX) having a first switch coupled between a first input and a first output, a first pullup device coupled between VDD and the first output, and a first pulldown device coupled between the first output and VSS is controlled. For falling slope of the first output, in a first phase, which is before the falling slope of the first output, turning ON the first switch, and turning OFF the first pullup device. In a second phase, which is during the falling slope of the first output, the first input is coupled to an output of a digital to analog converter coupled to the MUX. In a third phase, which is after the falling slope of the first output, the first switch is turned OFF and the first pulldown device is turned ON.
WIDE TUNING RANGE OSCILLATOR
Certain aspects provide a circuit for generating an oscillating signal. The circuit generally includes a voltage-controlled oscillator (VCO) having cross-coupled transistors, a first capacitive element and a second capacitive element coupled to the cross-coupled transistors, and a first inductive element and a second inductive element coupled to the cross-coupled transistors. First terminals of the first inductive element and the second inductive element are coupled to first terminals of the first capacitive element and the second capacitive element, respectively. The circuit also includes a control circuit having an output coupled to a supply voltage node at second terminals of the first inductive element and the second inductive element, and a feedback path coupled between the VCO and an input of the control circuit.
Attenuation of flicker noise in bias generators
This disclosure provides systems and apparatuses for reducing flicker noise in output signals provided by a radio frequency (RF) amplifier. In some implementations, the RF amplifier may include a bias generator to provide one or more bias signals to control operating points of devices and circuits of the RF amplifier. The bias generator may include a feedback circuit to generate a current to attenuate flicker noise within the bias generator. In some implementations, the feedback circuit may receive a bias voltage and may generate the current based on a frequency of the bias voltage.
Four-phase oscillator and CDR circuit
A four-phase oscillator includes, a first oscillator configured to output a first differential signal, a second oscillator configured to output a second differential signal shifted in phase with respect to the first differential signal by 90 or 90 degrees, and a control circuit. The first oscillator includes a first tail current source and a second tail current source. The second oscillator includes a third tail current source and a fourth tail current source. The control circuit changes the frequency of the first and second differential signals by controlling at least one of a difference between a first current value supplied from the first tail current source and a third current value supplied from the third tail current source and a difference between a second current value supplied from the second tail current source and a fourth current value supplied from the fourth tail current source.
Resonator circuit
The invention relates to a resonator circuit, the resonator circuit comprising a transformer comprising a primary winding and a secondary winding, wherein the primary winding is inductively coupled with the secondary winding, a primary capacitor being connected to the primary winding, the primary capacitor and the primary winding forming a primary circuit, and a secondary capacitor being connected to the secondary winding, the secondary capacitor and the secondary winding forming a secondary circuit, wherein the resonator circuit has a common mode resonance frequency at an excitation of the primary circuit in a common mode, wherein the resonator circuit has a differential mode resonance frequency at an excitation of the primary circuit in a differential mode, and wherein the common mode resonance frequency is different from the differential mode resonance frequency.
Transconductance controlling circuit
A transconductance controlling circuit is provided. The transconductance controlling circuit includes a resonance circuit, a negative-resistance unit-circuit and a transconductance boosting circuit. The resonance circuit generates an oscillation signal. The negative-resistance unit-circuit is coupled to a resonance circuit and includes a first transistor and a second transistor. The transconductance boosting circuit is coupled to the negative-resistance unit-circuit and includes a third transistor and a fourth transistor. A first drain of the first transistor is coupled to a third drain of the third transistor, a first gate of the first transistor is coupled to a third gate of the third transistor, the first gate of the first transistor is coupled to a second drain of the second transistor, and a first base of the first transistor is coupled to a fourth base of the fourth transistor and to a fourth source of the fourth transistor.