Patent classifications
H03B5/1271
Peak detector calibration
A calibration circuit for calibrating a peak detector configured to detect a signal peak amplitude of an oscillator, including: a calibration oscillator configured to be supplied by at least two different supply voltages to generate respective calibration signals; a calibration peak detector configured to detect a calibration signal peak amplitude of each of the calibration signals; and a logic circuit configured to calibrate the peak detector based on the detected calibration signal peak amplitudes.
QUADRATURE VOLTAGE-CONTROLLED OSCILLATOR CIRCUIT WITH PHASE SHIFT
A quadrature voltage-controlled oscillator circuit with phase shift includes two voltage-controlled oscillators with the same structure, wherein the two voltage-controlled oscillators are connected to each other through input and output ports, and the two voltage-controlled oscillators respectively include a cross-coupled oscillating circuit, an injection locking circuit, a resonant circuit and a voltage-controlled current source circuit which are electrically connected to each other; and signals are injected through the injection locking circuit and coupled with the oscillating circuit, so as to output a quadrature signal. An oscillator is enabled to operate stably in one mode by means of a simple circuit structure, and a good phase shift can be provided for the resonant circuit in a lower frequency band; and meanwhile, a tuning range of the oscillator is improved without increasing phase noise.
PEAK DETECTOR CALIBRATION
A calibration circuit for calibrating a peak detector configured to detect a signal peak amplitude of an oscillator, including: a calibration oscillator configured to be supplied by at least two different supply voltages to generate respective calibration signals; a calibration peak detector configured to detect a calibration signal peak amplitude of each of the calibration signals; and a logic circuit configured to calibrate the peak detector based on the detected calibration signal peak amplitudes.
Frequency reference generator
An LC oscillator has a tank driver connected to cause a matched-resistance LC tank to oscillate. The LC tank has an inductor leg in parallel with a capacitor leg. The inductor leg has an explicit inductor having an implicit resistance level R.sub.L. The capacitor leg has an explicit capacitor having an implicit resistance level R.sub.C connected in series with an explicit resistor having an explicit resistance level R.sub.R, where R.sub.M=(R.sub.C+R.sub.R) is substantially equal to R.sub.L. The LC oscillator may have a non-trimmable LC tank and be part of a temperature-compensated frequency reference generator having standalone frequency adjustment circuitry that offers better than 0.1% frequency accuracy (after single trim and batch calibration) over process, voltage, and temperature variations, and lifetime, which can serve as a low-cost replacement for a crystal oscillator for many applications.
Multi-Mode Oscillation Circuitry with Stepping Control
An apparatus is disclosed for implementing multi-mode oscillation circuitry with stepping control. In an example aspect, the multi-mode oscillation circuitry comprises a resonator coupled to a first oscillator and a second oscillator. The multi-mode oscillation circuitry is configured to selectively be in a first configuration with the first oscillator in an active state and the second oscillator in an inactive state or a second configuration with the first oscillator in the inactive state and the second oscillator in the active state. The apparatus also includes a step-control circuit coupled to the multi-mode oscillation circuitry. The step-control circuit is configured to cause the first oscillator to switch from the inactive state to the active state and incrementally increase a first gain of the first oscillator based on the first oscillator being in the active state to enable the multi-mode oscillation circuitry to transition from the second configuration to the first configuration.
Low-power low-phase-noise oscillator
The present disclosure describes a low-power, low-phase-noise (LPLPN) oscillator. The LPLPN oscillator includes a resonator load, an amplifier stage, and a loop gain control circuit. The resonator load is structured to resonate at a primary resonant frequency. The amplifier stage is coupled with the resonator load to develop a loop gain that peaks at the primary resonant frequency. The loop gain control circuit is coupled with the amplifier stage, and it is structured to regulate the loop gain for facilitating the amplifier stage to generate an oscillation signal at the primary resonant frequency and suppress a noise signal at a parasitic parallel resonant frequency (PPRF).
APPARATUSES AND METHODS FOR TRANSMITTING AN OPERATION MODE WITH A CLOCK
Apparatuses and methods for transmitting a command mode (e.g., operation mode) associated with a command between devices are disclosed. One device may be configured as a master and one or more devices may be configured as slaves. The command mode may be transmitted by the master to the slaves by setting a resting state of a clock signal transmitted between the devices and transitioning a device enable signal to an active state. The slaves may detect the resting state of the clock at the time the enable signal is transitioned to the active state in order to determine the command mode of the command. The devices may then execute the command in the mode indicated by the transmitted command mode.
System and Method for Intrusion Detection
An information handling system includes an intrusion detection circuit having two inductors and an amplifier circuit. The amplifier circuit is configured to identify an increase in inductive coupling between the inductors in response to a change in position of a cover.
FBAR-BASED LOCAL OSCILLATOR GENERATION
In some aspects, the disclosure is directed to methods and systems for utilizing a thin-film bulk acoustic resonator (FBAR) as a frequency reference for a phase-locked loop (PLL) circuit controlling frequency of a voltage controlled oscillator (VCO). In some implementations, the FBAR-based oscillator may be used as a reference to an analog or digital PLL circuit (either directly, or divided to a lower frequency). In other implementations, the FBAR-based oscillator may be used as a reference to a mixing-based PLL rather than a dividing-based PLL. Through these implementations, the noise contribution of many of the PLL circuit components or elements may be reduced (e.g. noise from a delta-sigma modulator (DSM), multiple modulus divider (MMD), phase frequency detector (PFD)/charge pump (CP), etc.).
Wideband Voltage-Controlled Oscillator Circuitry
An electronic device may include a transceiver with mixer circuitry that up-converts or down-converts signals based on a voltage-controlled oscillator (VCO) signal. The transceiver circuitry may include first, second, third, and fourth VCOs. Each VCO may include a VCO core that receives a control voltage and an inductor coupled to the VCO core. Fixed linear capacitors may be coupled between the VCO cores. A switching network may be coupled between the VCOs. Control circuitry may place the VCO circuitry in one of four different operating modes and may switch between the operating modes to selectively control current direction in each of the inductors. The VCO circuitry may generate the VCO signal within a respective frequency range in each of the operating modes. The VCO circuitry may exhibit a relatively wide frequency range across all of the operating modes while introducing minimal phase noise to the system.