A technique for reducing jitter in an oscillating signal generated by an oscillator circuit includes reducing feedback of gate leakage current while increasing electrostatic discharge protection and reducing regulated power supply requirements of the oscillator circuit, as compared to conventional oscillator circuits. A circuit includes a first integrated circuit terminal and a thick gate native transistor of a first conductivity type having a first gate terminal having a first gate thickness. The first gate terminal is coupled to the first integrated circuit terminal. The thick gate native transistor has a first threshold voltage. The thick gate native transistor is configured as a source follower. The circuit includes a second transistor of the first conductivity type having a second gate terminal with a second gate thickness less than the first gate thickness. The second gate terminal is coupled to a source terminal of the thick gate native transistor.

A circuit device includes a phase comparator that performs phase comparison between an input signal based on an oscillation signal and a reference signal, a processor that performs a digital signal process on phase comparison result data which is a result of the phase comparison so as to generate frequency control data, and an oscillation signal generation circuit that generates the oscillation signal having an oscillation frequency which is set on the basis of the frequency control data. The processor performs the digital signal process by using data used when a hold-over state is ended in a case where the hold-over state occurs due to the absence or the abnormality of the reference signal, and then the hold-over state is ended.

A crystal oscillator and a phase noise reduction method thereof are provided. The crystal oscillator may include a crystal oscillator core circuit, a first bias circuit and a phase noise reduction circuit, the first bias circuit is coupled to an output terminal of the crystal oscillator core circuit, and the phase noise reduction circuit is coupled to the output terminal of the crystal oscillator core circuit. In operations of the crystal oscillator, the crystal oscillator core circuit is configured to generate a sinusoidal wave. The first bias circuit is configured to provide a first voltage level to be a bias voltage of the sinusoidal wave. The phase noise reduction circuit is configured to reset the bias voltage of the sinusoidal wave in response to a voltage level of the sinusoidal wave exceeding a specific voltage range. For example, the specific voltage range is determined according to a second voltage level.

An oven controlled crystal oscillator includes a crystal oscillator, a temperature control circuit, and a control integrated circuit. The crystal oscillator includes a crystal resonator and an oscillator circuit. The temperature control circuit includes a heater resistor, a thermistor, a first resistor, a second resistor, a third resistor, a differential amplifier, a thermosensor, and a fourth resistor. The thermosensor is disposed in parallel to the first resistor. The thermosensor has one end to which the supply voltage is supplied. The fourth resistor has one end connected to another end of the thermosensor and another end that is grounded. The control integrated circuit includes a digital variable resistor and a controller. The digital variable resistor is connected to the thermosensor in parallel. The controller adjusts a resistance value of the digital variable resistor based on a digital control signal input from outside.

An oscillator includes an oscillation circuit, an operation state signal generation circuit that generates an operation state signal based on an operation state of the oscillation circuit, and a first integrated circuit, the oscillation circuit and the operation state signal generation circuit are disposed outside the first integrated circuit, and the first integrated circuit includes a first digital interface circuit, a D/A conversion circuit that converts a digital signal input via the first digital interface circuit into an analog signal to generate a frequency control signal that controls a frequency of the oscillation circuit, and a terminal to which the operation state signal is input.

A vibrator device includes a semiconductor substrate, a base, a vibrating element, and a lid. The semiconductor substrate has a first surface and a second surface which is in a front-back relationship with the first surface. The base includes an integrated circuit disposed on a first surface or a second surface. The vibrating element is electrically coupled to the integrated circuit and is disposed on the first surface side. The lid is joined to the base at a joining portion of the base to accommodate the vibrating element. The integrated circuit includes a passive element, and the passive element is disposed such that at least a part of the passive element overlaps with the joining portion in a plan view from a direction orthogonal to the first surface.

A control circuit switches an oscillation circuit from a second operation mode to a first operation mode. When a first predetermined signal is detected and mode switching permission information indicates that the switching from the second operation mode to the first operation mode is permitted, then the oscillation circuit switches from the second operation mode to the first operation mode. When the first predetermined signal is not detected and the mode switching permission information indicates that the switching from the second operation mode to the first operation mode is not permitted, then the oscillation circuit continues in the second operation mode.

An apparatus injects a start clock to a crystal at the beginning to increase an overall start up speed of the crystal. The apparatus relies on an impedance change inside the crystal itself instead of searching for a synchronization on the yet small crystal oscillation. The apparatus includes an oscillator (separate from the crystal) to search for the crystal's resonance frequency by detecting the crystal's impedance change. Once the frequency of the oscillator matches the crystal's resonance, there is significant change in the crystal's impedance. Using that information, the apparatus can lock the oscillator frequency at the crystal resonance frequency and inject the clock with high efficiency.

A circuit device includes an oscillation circuit which is electrically coupled to a first node to electrically be coupled to one end of a resonator and a second node to electrically be coupled to another end of the resonator, and is configured to oscillate the resonator to generate an oscillation signal, and a waveform shaping circuit which is coupled to the first node, to which the oscillation signal is input from the first node, and which is configured to output a clock signal obtained by performing waveform shaping on the oscillation signal, and a duty adjustment circuit configured to supply the first node with a bias voltage which is variably adjusted based on adjustment data to thereby adjust a duty ratio of the clock signal.

A circuit device includes an oscillation circuit configured to oscillate a resonator to thereby generate an oscillation signal, a waveform shaping circuit to which the oscillation signal is input, and which is configured to output a clock signal obtained by performing waveform shaping on the oscillation signal, a first duty adjustment circuit configured to perform a duty adjustment of the clock signal, and an output buffer circuit configured to output a first output clock signal and a second output clock signal to an outside based on the clock signal. The output buffer circuit includes a second duty adjustment circuit configured to perform a duty adjustment of the second output clock signal.