An envelope tracking (ET) integrated circuit (IC) (ETIC) is provided. The ETIC includes a number of ET circuits coupled to a number of amplifier circuits configured to amplify a radio frequency signal based on a number of ET voltages, respectively. The ET circuits are configured to generate the ET voltages based on a number of ET target voltages, respectively. The ETIC includes a reference ET circuit configured to generate a reference ET voltage based on a maximum ET target voltage among the ET target voltages. A selected ET circuit(s) among the ET circuits may be configured to not generate a respective ET voltage(s) but instead forward the reference ET voltage to a respective amplifier circuit(s) as the respective ET voltage(s). Hence, it may be possible to partially or completely turn off the selected ET circuit(s) to help reduce peak battery current and improve heat dissipation in an ET amplifier apparatus.

An envelope tracking (ET) power amplifier apparatus is provided. In a non-limiting example, the ET power amplifier apparatus includes a single ET integrated circuit (ETIC) configured to support at least a pair of amplifier circuits for amplifying different radio frequency (RF) signals. One of the amplifier circuits may be configured to amplify a respective RF signal to a higher power and thus will operate based on an ET voltage whenever possible. Another amplifier circuit, on the other hand, may be configured to amplify a respective RF signal to a relatively lower power and thus will only operate based on the ET voltage when the other amplifier circuit is inactive. By employing a single ETIC, it may be possible to reduce footprint of the ET power amplifier apparatus, thus making it possible to fit the ET power amplifier apparatus into a small form factor electronic device, such as a wearable device.

An envelope tracking (ET) amplifier apparatus is provided. In examples discussed herein, the ET amplifier apparatus can be configured to operate in a fifth-generation (5G) standalone (SA) mode and a 5G non-standalone (NSA) mode. In the SA mode, the ET amplifier apparatus can enable a first pair of amplifier circuits to amplifier a 5G signal for concurrent transmission in a 5G band(s). In the NSA mode, the ET amplifier apparatus can enable a second pair of amplifier circuits to amplify a non-5G anchor signal and a 5G signal for concurrent transmission in a non-5G anchor band(s) and a 5G band(s), respectively. As such, the ET circuit may be provided in a communication apparatus (e.g., a 5G-enabled smartphone) to help improve power amplifier linearity and efficiency in both 5G SA and NSA modes.

Disclosed is envelope tracking circuitry having an envelope tracking integrated circuit (ETIC) coupled to a power supply to provide an envelope tracked power signal to a power amplifier (PA) with a filter equalizer configured to inject an error-correcting signal into the ETIC in response to equalizer settings. Further included is PA resistance estimator circuitry having a first peak detector circuit configured to capture within a window first peaks associated with a sense current generated by the ETIC, a second peak detector circuit configured to capture within the window second peaks associated with a scaled supply voltage corresponding to the envelope tracked power signal, comparator circuitry configured to receive the first peaks and receive the second peaks and generate an estimation of PA resistance, and an equalizer settings correction circuit configured to receive the estimation of PA resistance and update the equalizer settings in response to the estimation of PA resistance.

An envelope tracking (ET) integrated circuit (ETIC) supporting multiple types of power amplifiers. The ETIC includes a pair of tracker circuits configured to generate a pair of low-frequency currents at a pair of output nodes, respectively. The ETIC also includes a pair of ET voltage circuits configured to generate a pair of ET voltages at the output nodes, respectively. In various embodiments disclosed herein, the ETIC can be configured to generate the low-frequency currents independent of what type of power amplifier is coupled to the output nodes. Concurrently, the ETIC can also generate the ET voltages in accordance with the type of power amplifier coupled to the output nodes. As such, it is possible to support multiple types of power amplifiers based on a single ETIC, thus helping to reduce footprint, power consumption, and heat dissipation in an electronic device employing the ETIC and the multiple types of power amplifiers.

Various implementations include systems for amplifying input signals. In particular implementations, a system includes a common mode voltage controller configured to receive an input signal and output a pair of adjusted signals; a modulator that generates a pair of pulse width modulation (PWM) signals in response to the adjusted signals; and a self-boosting push pull amplifier configured to receive the PWM signals and generate an amplified output, wherein the self-boosting push pull amplifier is configured to generate a differential mode voltage representative of an amplified version of the input signal, wherein the adjusted audio signals generated by the common mode voltage controller include a dynamically adjusted gain and duty cycle offset that causes the self-boosting push pull amplifier to operate with a reduced common mode voltage.

In a discrete supply modulation system, a circuit includes a multi-stage pulse shaping network (PSN) having a first PSN stage having an input configured to receive variable bias supply signals from a power management circuit (PMC) and having an output coupled to one or more second PSN stages with each of the one or more second PSN stages having an output configured to be coupled to a supply (or bias) terminal of a respective one of one or more radio frequency amplifiers. Such an arrangement is suitable for use with transmit systems in mobile handsets operating in accordance with 5.sup.th generation (5G) communications and other connectivity protocols such as 802.11 a/b/g/n/ac/ax/ad/ay and is suitable for use with multiple simultaneous transmit systems including multiple-input, multiple-output (MIMO), uplink carrier aggregation (ULCA) and beamforming.

Systems, methods and apparatus for practical realization of an integrated circuit comprising a stack of transistors operating as an RF amplifier are described. As stack height is increased, capacitance values of gate capacitors used to provide a desired distribution of an RF voltage at the output of the amplifier across the stack may decrease to values approaching parasitic/stray capacitance values present in the integrated circuit which may render the practical realization of the integrated circuit difficult. Coupling of an RF gate voltage at the gate of one transistor of the stack to a gate of a different transistor of the stack can allow for an increase in the capacitance value of the gate capacitor of the different transistor for obtaining an RF voltage at the gate of the different transistor according to the desired distribution.

A reconfigurable power detector is described. The reconfigurable power detector includes a first power detector circuit. The first power detector circuit includes a pair of coupled first-type transistors to switch a first-type positive output and a first-type negative output. The reconfigurable power detector includes a second power detector circuit. The second power detector circuit includes a pair of coupled second-type transistors to switch a second-type positive output and a second-type negative output. The reconfigurable power detector includes a switch matrix. The switch matrix includes switches to select the second-type positive output and the second-type negative output in a first configuration, the first-type positive output and the first-type negative output in a second configuration, and the first-type positive output and the second-type positive output in a third configuration. The reconfigurable power detector also includes a configuration block to program the switches to select an output configuration at a detector output.

An amplifier circuit includes a voltage-to-current conversion circuit and a current-to-voltage conversion circuit. The voltage-to-current conversion circuit generates a current signal according to an input voltage signal, and includes an operational transconductance amplifier (OTA) used to output the current signal at an output port of the OTA. The current-to-voltage conversion circuit generates an output voltage signal according to the current signal, and includes a linear amplifier (LA), wherein an input port of the LA is coupled to the output port of the OTA, and the output voltage signal is derived from an output signal at an output port of the LA.