A RF control circuit is provided and includes a controller, a divider, and a RF sensor. The controller selects a RF, which is a frequency of a reference LO signal. The divider receives a first RF signal detected in a substrate processing chamber and outputs a second RF signal. The first RF signal is generated by a RF generator and supplied to the substrate processing chamber. The RF sensor includes a lock-in amplifier, which includes: a RF path that receives the second RF signal; a LO path that receives the reference LO signal; a first mixer that generates an IF signal based on the second RF signal and the reference LO signal; and a filter that filters the IF signal. The controller generates a control signal based on the filtered IF signal and transmits the control signal to the RF generator to adjust the first RF signal.

A vector distribution method for operation of a power amplifier of a wireless transmitter including receiving, by a first amplifier circuit, a first input vector and a second input vector. The first input vector includes data derived from an input signal of the wireless transmitter and the second input vector includes other data derived from the input signal of the wireless transmitter. The method includes, in response to receiving the input signal, instructing the first amplifier circuit to output an output signal at a high voltage.

An amplifier may include control circuitry that may track a first input signal parameter and, in response, adjust a value of a second input parameter. Input parameter tracking and adjustment may facilitate control of output parameters for the amplifier. For example, an envelope-tracking amplifier may track input signal amplitude and adjust other input parameters in response. The adjustments may facilitate control of output parameters, such as gain or efficiency. The amplifier may further include calibration circuitry to determine adjustment responses to various tracked input parameters.

A receiver amplifier and also a receiver equalizer is provided for a three-level signaling system. The receiver amplifier includes a single current source that drives a current into node shared by three transistors arranged in parallel. A trio of input signals corresponds to the three transistors on a one-to-one basis. Each input signal drives the gate of its corresponding transistor. In addition, each transistor produces a corresponding output voltage at a terminal coupled to a resistor. The receiver equalizer includes three transistors and three corresponding equalizing pairs of a resistor and a capacitor. A terminal for the capacitor and for the resistor in each equalizing pair connects to a terminal of the corresponding transistor.

Systems, methods and apparatus for practical realization of an integrated circuit comprising a stack of transistors operating as an RF amplifier are described. As stack height is increased, capacitance values of gate capacitors used to provide a desired distribution of an RF voltage at the output of the amplifier across the stack may decrease to values approaching parasitic/stray capacitance values present in the integrated circuit which may render the practical realization of the integrated circuit difficult. Coupling of an RF gate voltage at the gate of one transistor of the stack to a gate of a different transistor of the stack can allow for an increase in the capacitance value of the gate capacitor of the different transistor for obtaining an RF voltage at the gate of the different transistor according to the desired distribution.

The present invention provides a class-G amplifier, wherein the class-G amplifier includes an amplifier stage, an impedance detector and a power source. In the operations of the class-G amplifier, the amplifier stage is supplied by a supply voltage, and amplifies an input audio signal to generate an output audio signal, and the impedance detector is configured to detect an output impedance of the amplifier stage to generate a detection result, and the power source refers to the detection result to determine a level and a switching frequency of the supply voltage.

Apparatus and methods for envelope tracking systems are provided. In certain configurations, an envelope tracking system includes a digital filter that generates a filtered envelope signal based on a digital envelope signal representing an envelope of a radio frequency signal, a buck converter controllable by the filtered envelope signal and including an output electrically connected to a power amplifier supply voltage, a digital-to-analog converter module including an output electrically connected to the output of the buck converter and that provides an output current, and a digital shaping and delay circuit configured to generate a shaped envelope signal based on shaping the filtered envelope signal. The shaped envelope signal controls a magnitude of the output current, and the digital shaping and delay circuit controls a delay of the shaped envelope signal to align the output of the digital-to-analog converter module and the output of the buck converter.

An envelope tracking (ET) amplifier circuit is provided. In examples discussed herein, an amplifier circuit(s) is configured to amplify a radio frequency (RF) signal based on an ET modulated voltage. A tracker circuit is configured to generate the ET modulated voltage based on a number of target voltage amplitudes derived from a time-variant signal envelope of the RF signal. However, the tracker circuit can cause the ET modulated voltage to deviate from the target voltage amplitudes due to various impedance variations. In this regard, a voltage memory digital pre-distortion (mDPD) circuit digitally pre-distorts the target voltage amplitudes based on the time-variant signal envelope such that the ET modulated voltage can closely track the target voltage amplitudes. As such, it is possible to mitigate ET modulated voltage deviation, thus helping to improve overall linearity performance of the ET amplifier circuit.

A subharmonic switching power amplifier architecture includes a power amplifier core that includes at least one power amplifier that receives an input signal and is operable in a power back-off region. Characteristically, the at least one power amplifier is configured to be toggled at a carrier frequency (Fc) when the power level of the input signal is equal to or higher than a predetermined power level and at a subharmonic component of the carrier frequency when the power level of the input signal is less than the predetermined power level. Concurrent harmonic tuning and subharmonic tuning is implemented to enhance the efficiency at both peak power mode and power back-off mode. Characteristically, the power amplifier being configured to be operated by a voltage mode or current mode driver and in the current mode with zero-voltage-switching.

A supply modulator, a modulated power supply circuit, and associated control method are provided. The modulated power supply circuit includes the supply modulator and a DC-DC voltage converter, and the supply modulator includes a linear amplifier and a switching converter. The linear amplifier generates an AC component of a modulated voltage according to a regulated voltage and an envelope tracking signal. The supply voltage is converted to the regulated voltage by the DC-DC voltage converter, and the regulated voltage is greater than or less than the supply voltage. The switching converter includes a step-down circuit and a path selection circuit. The path selection circuit selects one of the supply voltage and the regulated voltage as a DC input voltage. The step-down circuit converts the DC input voltage to a DC component of the modulated voltage which is less than the DC input voltage.