Apparatus and methods for capacitive load reduction are disclosed. In one embodiment, a mobile device includes a supply control circuit that controls a voltage of a supply network, a plurality of radio frequency circuits that receive power from the supply network and are selectively enabled by a plurality of enable signals, a plurality of switchable capacitors electrically connected to the supply network, a plurality of field-effect transistors operatively associated with the plurality of switchable capacitors, and a bias control circuit that generates a plurality of control signals that bias the plurality of field-effect transistors based on a state of the plurality of enable signals. Each of the plurality of control signals are operable to selectively bias a corresponding one of the plurality of field-effect transistors in a cutoff mode to provide high impedance or as a dampening resistor to suppress oscillations.

Structure and design methods of electrical power amplifiers suitable for broadband application such as television frequency or white spaces. An example broadband power amplifier passes a transmit carrier with modulations from BPSK to 256 QAM, on channel bandwidths from 6 to 32 MHz, over the entire UHF television band from 470 to 800 MHz using a low voltage, low power, narrowband power amplifier transistor. Based on a push-pull technique to lower the impedance level thus improving the match and doubling the power, the wide-band power amplification is performed with a balanced polynomial filter transform structure wherein the circuit impedance increases sequentially within the filter stage. The polynomial filtering makes high selectivity of out-of-band signals thereby cleaning up harmonic signals which prevent the need for additional high selective radio frequency filters. The invented power amplifier enables efficient broadband power amplifiers having a form factor within 300 square millimeters of space.

A device includes a first amplifier coupled to a first signal conduction path and a second amplifier coupled to a second signal conduction path. A first coupler is coupled to the first signal conduction path. The first coupler is configured to produce an output signal based on a first signal carried by the first signal conduction path. A delay element is configured to impose a phase delay on the output signal of the first coupler to generate a delayed output signal. The device includes a second coupler coupled to the second signal conduction path. The second coupler is connected to the delay element and configured to inject the delayed output signal into the second signal conduction path.

Embodiments relate to outphasing amplifiers and amplification. One example system includes a signal splitter configured to receive an input signal and output a plurality of signals, wherein the signal splitter shifts each of the plurality of signals by a distinct phase based at least in part on a power of the input signal; a plurality of power amplifiers (PAs), each configured to amplify a distinct signal of the plurality of signals to generate a distinct amplified signal; a plurality of input matching networks, each coupled to a distinct PA of the plurality of PAs and configured to transform an input impedance of the coupled PA to an outphasing load condition based on the distinct signal the coupled PA is configured to amplify; and a combiner configured to combine the plurality of distinct amplified signals to generate an amplified input signal.

A distributed amplifier includes: an input-side transmission line; M amplification circuits; M output-side transmission lines; and a combination circuit configured to combine outputs of the M output-side transmission lines; wherein the input-side transmission line has an input-side serial line formed by connecting in series MN unit transmission lines each including the same line length, and an input-side terminating resistor, the M amplification circuits each includes N amplifiers and the N amplifiers of the i-th amplification circuit take the input node of the ((k1) M+i)-th input-side transmission line to be the input, and the output-side transmission line includes an output-side serial line including N transmission lines each being connected in series between the neighboring outputs of the N amplifiers and each having a line width in which the phase of the output of the amplifier in each stage agrees with one another.

A traveling-wave amplifier includes a plurality of amplifier cells, an insulating layer, an input line, and an output line. The plurality of amplifier cells is provided on a semiconductor substrate. Each of the amplifier cells receives an input signal and generates a part of an output signal from the input signal. The insulating layer is provided on the semiconductor substrate. The input line is used to externally receive an input signal and to transmit the input signal to the amplifier cells respectively. The output line is used to transmit the output signal generated by the amplifier cells and to externally output the output signal. The thickness of the input line is smaller than the thickness of the output line, and the input line and the output line are provided on the same insulating layer.

A signal amplifier includes a band suppression filter configured to suppress a preset band among bands included in an input signal, a first common source-type amplifier connected between a supply terminal of a driving voltage and a ground terminal and configured to amplify a first input signal separated from an output signal of the band suppression filter in a common input node to provide a first amplified signal to a common output node, a second common source-type amplifier configured to amplify a second input signal separated from the output signal of the band suppression filter in the common input node to provide a second amplified signal to the common output node, and an output matcher configured to match levels of impedance between the common output node and an output terminal and to transfer a combined signal to the output terminal.

Described herein are load-modulated balanced amplifiers. An example load-modulated balanced amplifier can include a radio frequency (RF) input port, a RF output port, a peaking amplifier circuit operably coupled between the RF input and RF output ports, where the peaking amplifier circuit is a balanced amplifier that includes a pair of power amplifiers, and a carrier amplifier circuit operably coupled to the RF input port.

A radio-frequency power amplifier device includes: a carrier amplifier semiconductor device and a peak amplifier semiconductor device on a multilayer submount substrate; a bias power supply semiconductor device; second radio-frequency signal wiring that transmits radio-frequency signal to the carrier amplifier semiconductor device and the peak amplifier semiconductor device; and carrier-amplifier bias power supply wiring that is wired in a third wiring layer and supplies a bias power supply voltage. The second radio-frequency signal wiring and the carrier-amplifier bias power supply wiring intersect in a plan view. The radio-frequency power amplifier device includes: a shield pattern that is located in a second wiring layer between a first wiring layer and the third wiring layer; and one or more connection vias disposed in an extension direction of the carrier-amplifier bias power supply wiring. The one or more connection vias are connected to the shield pattern.

A reconfigurable Doherty power amplifier includes a packaged power splitter device, main and peaking amplifiers, and a combiner circuit. The power splitter device includes a power divider, input terminals coupled to first and second ports of the power divider, and output terminals coupled to third and fourth ports of the power divider. One of the input terminals is coupled to an RF signal input terminal, and the other input terminal is terminated. The power divider receives an input RF signal, and produces main and peaking RF signals at the third and fourth ports of the power divider, respectively. The main and peaking amplifiers amplify the main and peaking RF signals, respectively. The combiner circuit includes a summing node and a phase delay element between outputs of the main and peaking amplifiers. An RF signal output terminal is coupled to the summing node.