The embodiments described herein include amplifiers that are typically used in radio frequency (RF) applications. The amplifiers described herein use a combiner that is implemented inside the device package. Specifically, the amplifiers can be implemented with a combiner that includes a transmission line inside the device package, where the transmission line has a length between first and second ends configured to provide an impedance inverter between the outputs (e.g., drain terminals) of transistors in the amplifier.

Apparatus and methods for capacitive load reduction are disclosed. In one embodiment, a mobile device includes a supply control circuit that controls a voltage of a supply network, a plurality of radio frequency circuits that receive power from the supply network and are selectively enabled by a plurality of enable signals, a plurality of switchable capacitors electrically connected to the supply network, a plurality of field-effect transistors operatively associated with the plurality of switchable capacitors, and a bias control circuit that generates a plurality of control signals that bias the plurality of field-effect transistors based on a state of the plurality of enable signals. Each of the plurality of control signals are operable to selectively bias a corresponding one of the plurality of field-effect transistors in a cutoff mode to provide high impedance or as a dampening resistor to suppress oscillations.

A balanced Doherty power amplifier circuit and a radio transmitter is provided. The circuit includes a first peak amplifier, where an input end of the first peak amplifier is connected to a first input end of the circuit, and a first mean amplifier, where an input end of the first mean amplifier is connected to a second input end of the circuit, and an output end of the first mean amplifier is connected to an input end of a first matching unit. The circuit also includes a second peak amplifier, where an input end of the second peak amplifier is connected to the first input end of the circuit; and a second mean amplifier, where an input end of the second mean amplifier is connected to the second input end of the circuit, and an output end of the second mean amplifier is connected to an input end of the second matching unit.

According to one embodiment, a power amplifying device includes a first amplifier configured to output a first output signal, a second amplifier configured to output a second output signal, a first circuit configured to output a third signal obtained by limiting a magnitude of a voltage value of the first output signal and a fourth signal obtained by limiting a magnitude of a voltage value of the second output signal, and a second circuit configured to transmit an average value of a voltage value of the third signal and a voltage value of the fourth signal, as a first feedback voltage to the first amplifier and the second amplifier.

Increase in power-added efficiency can be achieved. A second base of a second transistor is connected to a first collector of a first transistor. A third base of a third transistor is connected to the first collector of the first transistor, and a third collector of the third transistor is connected to a second collector of the second transistor. A second bias circuit includes a fifth transistor connected to the second base of the second transistor. A third bias circuit includes a sixth transistor connected to the third base of the third transistor. A first current limiting circuit includes a seventh transistor, a first collector resistor, and a first base resistor. A second current limiting circuit includes an eighth transistor, a second collector resistor, and a second base resistor.

Provided is a dual-drive based Doherty amplifier that includes a first power amplifier and a second power amplifier that is in parallel with the first power amplifier. The first power amplifier is configured to receive a first portion of a signal having a first phase, and the second power amplifier is configured to receive a second portion of the signal having a second phase that has a phase difference from the first phase. At least one of the first power amplifier or the second power amplifier includes a dual-drive power amplifier core.

A method for power amplification uses circuitry including a main amplifier and an auxiliary amplifier that are constructed and operate such that an input is applied to the main and auxiliary amplifiers via an input network. At low power levels, the auxiliary amplifier is off and the main amplifier sees a large impedance. At maximum power level, both the auxiliary and main amplifiers operate at full power and there is a constant phase shift between them. While transitioning from low to maximum power, systematic AM-AM and AM-PM variations generated due to the phase shift provided by the input network, bias differences between the main and auxiliary amplifiers, and nature of the output combiner to compensate device related distortions.

The feed reflected Doherty amplifier utilizes the output characteristics of the carrier amplifier to control the input signal of the peaking amplifier to improve the gain, linearity and efficiency of a Doherty amplifier. The feed reflected Doherty amplifier comprises an input power splitter, a carrier amplifier branch and a peaking amplifier branch combined into a common load, an output directional coupler and an input directional coupler connected via a phase shift element.

A harmonic processing circuit includes: a feeder line configured to feed power to an amplifying device; and a harmonic processing unit connected to the feeder line, and configured to perform harmonic processing to a harmonic of a signal outputted from the amplifying device. The feeder line is connected to a fundamental wave matching circuit that is connected to the amplifying device and performs matching at a fundamental wave frequency of the signal.

A harmonic processing circuit includes: a feeder line configured to feed power to an amplifying device; and a harmonic processing unit connected to the feeder line, and configured to perform harmonic processing to a harmonic of a signal outputted from the amplifying device. The feeder line is connected to a fundamental wave matching circuit that is connected to the amplifying device and performs matching at a fundamental wave frequency of the signal.