Herein disclosed in some embodiments is a fault detector for power amplifiers of a communication system. The fault detector can detect a portion of the power amplifiers that are in fault condition and can prevent or limit current flow to the power amplifiers in fault condition while allowing the rest of the power amplifiers to operate normally. The fault detector can further indicate which power amplifiers are in fault condition and/or the cause for the power amplifiers to be in fault condition. Based on the indication, a controller can direct communications away from the power amplifiers in fault condition and/or perform operations to correct the fault condition.

A harmonic processing circuit includes: a feeder line configured to feed power to an amplifying device; and a harmonic processing unit connected to the feeder line, and configured to perform harmonic processing to a harmonic of a signal outputted from the amplifying device. The feeder line is connected to a fundamental wave matching circuit that is connected to the amplifying device and performs matching with respect to a fundamental wave of the signal.

A harmonic processing circuit includes: a feeder line configured to feed power to an amplifying device; and a harmonic processing unit connected to the feeder line, and configured to perform harmonic processing to a harmonic of a signal outputted from the amplifying device. The feeder line is connected to a fundamental wave matching circuit that is connected to the amplifying device and performs matching with respect to a fundamental wave of the signal.

A power amplifier circuit includes a power splitter, a first amplifier configured to output a first amplified signal from a first output terminal, and a second amplifier configured to output a second amplified signal from a second output terminal. The power amplifier circuit further includes a first termination circuit connected between the first output terminal and the second output terminal, a first transmission line, a second transmission line, a second termination circuit connected between another end of the first transmission line and another end of the second transmission line, and a power combiner.

Integrated Doherty power amplifiers are provided herein. In certain implementations, a Doherty power amplifier includes a carrier amplification stage that generates a carrier signal, a peaking amplification stage that generates a peaking signal, and an antenna structure that combines the carrier signal and the peaking signal. The antenna structure radiates a transmit wave in which the carrier signal and the peaking signal are combined with a phase shift.

A power amplifier system includes: a drive stage configured to amplify an RF input signal and implemented in a substrate containing silicon; a power stage including a carrier amplifier configured to amplify a base signal from the RF input signal as amplified by the drive stage, and a peaking amplifier configured to amplify a peak signal from the RF input signal as amplified by the drive stage, the power stage being implemented in a substrate containing gallium arsenide; and a phase compensation circuit configured to change a phase of the RF input signal, wherein either the carrier amplifier or the peaking amplifier is connected to the phase compensation circuit.

An apparatus has a Radio Frequency (RF) signal generator to produce RF signals phase shifted relative to one another in accordance with RF frequency waveform parameters. Amplifier chains process the RF signals to produce channels of amplified RF signals. Each amplifier chain has amplifiers and at least one amplifier has a tunable gate voltage synchronized with the RF signals.

Apparatus and methods for an improved-efficiency Doherty amplifier are described. The Doherty amplifier may include a two-stage peaking amplifier that transitions from an “off” state to an “on” state later and more rapidly than a single-stage peaking amplifier used in a conventional Doherty amplifier. The improved Doherty amplifier may operate at higher gain values than a conventional Doherty amplifier, with no appreciable reduction in signal bandwidth.

Embodiments of this application provide a multiband power amplifier circuit and a radio frequency transceiver, to increase a VBW while ensuring linear correction and reducing a circuit loss. The multiband power amplifier circuit includes a first power transistor, a second power transistor, a first matching circuit, a second matching circuit, a third matching circuit, and a combiner. The first power transistor is coupled to a first input end of the combiner via the first matching circuit. The second power transistor is coupled to a second input end of the combiner via the second matching circuit. A first end of the third matching circuit is coupled to an output end of the first power transistor, and a second end of the third matching circuit is coupled to an output end of the second power transistor.

A power amplifier circuit includes a first amplifier that, in a region where an input signal level is a first level or higher, amplifies a signal split from an input signal and outputs an amplified signal; a first converter connected to an output side of the first amplifier and converts an impedance on the output side of the first amplifier; and at least one or more second amplifiers that, in a region where the input signal level is a second level or higher, amplify a signal split from the input signal and output an amplified signal. Output sides of the second amplifiers are connected in series with an output side of the first converter. The first converter makes an absolute value of the impedance on the output side of the first amplifier larger than absolute values of impedances on the output sides of the second amplifiers.