A local oscillator buffer circuit comprises a complementary common-source stage comprising a first p-channel transistor (MCSP) and a first n-channel transistor (MCSN), arranged such that their respective gate terminals are connected together at a first input node, and their respective drain terminals of each of is connected together at a buffer output node. A complementary source-follower stage comprises a second p-channel transistor (MSFP) and a second n-channel transistor (MSFN), arranged such that their respective gate terminals are connected together at a second input node, and their respective source terminals are connected together at the buffer output node.

A headphone driver is used to drive a headphone apparatus, which includes a first differential driver, a first positive output terminal, a first negative output terminal, and a second negative output terminal. The first positive output terminal is connected to the first terminal. A switch unit is disposed on a feedback path at the first negative output terminal and the second negative output terminal, to enable the first/second negative output terminal in feedback as a close loop to output to the third/fourth terminal and disable the second/first negative output terminal at a first/second operation state. The first differential driver includes a first positive voltage driving circuit, a first negative voltage driving circuit, and a second negative voltage driving circuit, respectively providing the first positive output terminal, the first negative output terminal, and the second negative output terminal.

A headphone driver is used to drive a headphone apparatus, which includes a first differential driver, a first positive output terminal, a first negative output terminal, and a second negative output terminal. The first positive output terminal is connected to the first terminal. A switch unit is disposed on a feedback path at the first negative output terminal and the second negative output terminal, to enable the first/second negative output terminal in feedback as a close loop to output to the third/fourth terminal and disable the second/first negative output terminal at a first/second operation state. The first differential driver includes a first positive voltage driving circuit, a first negative voltage driving circuit, and a second negative voltage driving circuit, respectively providing the first positive output terminal, the first negative output terminal, and the second negative output terminal.

An electronic device may include wireless circuitry with a baseband processor, a transceiver circuit, a front-end module, and an antenna. The front-end module may include amplifier circuitry such as a low noise amplifier for amplifying received radio-frequency signals. The low noise amplifier is operable in a non-carrier-aggregation (NCA) mode and a carrier aggregation (CA) mode. The low noise amplifier may include a first input stage, a second input stage, a complementary degeneration transformer, and an input impedance compensation circuit. During the NCA mode, the first input stage is turned on while the second input stage is turned off, the degeneration transformer is controlled to provide maximum inductance, and the compensation circuit is turned on to provide input matching. During the CA mode, the first and second input stages are turned on, the degeneration transformer is adjusted to provide less inductance, and the compensation circuit is turned off.

An electronic device may include wireless circuitry with a baseband processor, a transceiver circuit, a front-end module, and an antenna. The front-end module may include amplifier circuitry such as a low noise amplifier for amplifying received radio-frequency signals. The low noise amplifier is operable in a non-carrier-aggregation (NCA) mode and a carrier aggregation (CA) mode. The low noise amplifier may include a first input stage, a second input stage, a complementary degeneration transformer, and an input impedance compensation circuit. During the NCA mode, the first input stage is turned on while the second input stage is turned off, the degeneration transformer is controlled to provide maximum inductance, and the compensation circuit is turned on to provide input matching. During the CA mode, the first and second input stages are turned on, the degeneration transformer is adjusted to provide less inductance, and the compensation circuit is turned off.

An analog-to-digital converter (“ADC”) includes an input terminal configured to receive an analog input voltage signal. A first ADC stage is coupled to the input terminal and is configured to output a first digital value corresponding to the analog input voltage signal and a first analog residue signal corresponding to a difference between the first digital value and the analog input signal. An inverter based residue amplifier is configured to receive the first analog residue signal, amplify the first analog residue signal, and output an amplified residue signal. The amplified residue signal is converted to a second digital value, and the first and second digital values are combined to create a digital output signal corresponding to the analog input voltage signal.

An operational amplifier includes a first output transistor and a second output transistor connected in series between two power nodes, the second output transistor having a semiconductor type opposite to the first output transistor, the first output transistor and the second output transistor being electrically coupled at an output node, and gates of the first output transistor and the second output transistor being connected to a first drive node and a second drive node respectively; and a decoupling capacitor circuit electrically connected between the first drive node and the second drive node.

Various methods and circuital arrangements for biasing gates of stacked transistor amplifier that includes two series connected transistor stacks of different polarities are presented, where the amplifier is configured to operate according to different modes of operation. Such circuital arrangements operate in a closed loop with a feedback error voltage that is based on a sensed voltage at a common node of the two series connected transistor stacks. According to one aspect, gate biasing voltages to input transistors of each of the two series connected stacks are adjusted by respective current mirrors that are controlled based on the feedback error voltage. According to another aspect, other gate biasing voltages are generated by maintaining a fixed gate biasing voltage between any two consecutive gate basing voltages.

A differential signal input buffer is disclosed. The differential signal input buffer may receive a differential signal that includes a first signal and a second signal and may be divided into a first section and a second section and. The first section may buffer and/or amplify the first signal based on a first level-shifted second signal. The second section may buffer and/or amplify the second signal based on a first level-shifted first signal. In some implementations, the first section may buffer and/or amplify the first signal based on a second level-shifted second signal. Further, in some implementations, the second section may buffer and/or amplify the second signal based on a second level-shifted first signal.

An amplifier comprising a current-biased active device, a voltage-biased active device, the voltage-biased active device and the current-biased active device are connected in series, to form a cascade of active devices, and an input terminal and an output terminal, the cascade of active devices connected between the input terminal and the output terminal, having an output terminal for driving a load impedance with an output signal in response to an input signal applied to the input terminal.