Various methods and devices that involve pulsed signals are disclosed. An example minimum pulse-width (MPW) circuit comprises a first and second logic circuit. A first input of the first logic circuit is connected to an input of the MPW circuit. A first input of the second logic circuit is communicatively coupled to an output of the first logic circuit. The MPW circuit also comprises a MPW filter circuit communicatively coupled to an output of the second logic circuit, a one-shot circuit communicatively coupled to an output of the minimum pulse-width filter circuit and located on a first feedback path, and another one-shot circuit communicatively coupled to the output of the minimum pulse-width filter circuit and located on a second feedback path. A second input of the first logic circuit is on the first feedback path. A second input of the second logic circuit is on the second feedback path.

A fully integrated GaN driver comprising a digital logic signal inverter, a level shifter circuit, a UVLO circuit, an output buffer stage, and (optionally) a FET to be driven, all integrated in a single package. The level shifter circuit converts a ground reference 0-5 V digital signal at the input to a 0-10 V digital signal at the output. The output drive circuitry includes a high side GaN FET that is inverted compared to the low side GaN FET. The inverted high side GaN FET allows switch operation, rather than a source follower topology, thus providing a digital voltage to control the main FET being driven by the circuit.

Disclosed is a high voltage power system with enable control, comprising a high voltage start-up circuit, a PWM control module, and a driving module; the high voltage start-up circuit comprises a first transistor, a third transistor, a fourth transistor, a resistor, a diode, a VDD detection unit and an I/O interface unit; the high voltage start-up circuit is controlled by an input of a pin EN; when the pin EN is set, the high voltage start-up circuit stops working; the power system is shut off and doesn't restart, and enters a zero standby state; when the pin EN is reset, the high voltage start-up circuit restores to work, and the power system restarts and enters a normal working state. The power system having the high voltage start-up circuit with enable control has characteristics that the standby input power consumption and standby input current are both close to zero.

Circuits and methods control output voltage overshoot and undershoot of an SMPC in response to a load current transient. The SMPC control stage has at least one load variation detector that compares a feedback signal with at least one transient threshold level to determine that occurrence of the load current transient. When the load current transient has occurred, the at least one load variation detector causes a switch stage to be turned on to source or sink current to or from the load circuit to compensate the load current transient. A slope detector determines a change in polarity of the slope of the load current transient. When the slope changes polarity, the slope detector sends a signal for preventing an overshoot or an undershoot of the output voltage of the SMPC once the load current transient has been compensated.

A spike suppression circuit includes a wide bandgap transistor, a first transistor, a clamping circuit, and a capacitor. The wide bandgap transistor is depletion-type. The first transistor is coupled in series with the wide bandgap transistor. The clamping circuit provides a voltage difference, and is coupled to a common node between the wide bandgap transistor and the first transistor. The capacitor provides a supply voltage for the clamping circuit. When the first transistor is turned off, the capacitor can recycle spike energy at the common node.

A hysteresis comparator that has a small circuit area and low power consumption is provided. A differential pair in the comparator is formed using transistors each including a back gate. The comparator is configured to apply an inverted signal of a logic value of an output signal of the comparator to the back gate of the transistor. That is, the threshold voltage of the transistor is controlled by the inverted signal. By the change of the threshold voltage, hysteresis can be added to an input comparison voltage.

Control circuitry for controlling a current through an inductor of a power converter, the control circuitry comprising: comparison circuitry configured to compare a measurement signal, indicative of a current through the inductor during a charging phase of the power converter, to a signal indicative of a target average current through the inductor for the charging phase and to output a comparison signal based on said comparison; detection circuitry configured to detect, based on the comparison signal, a crossing time indicative of a time at which the current through the inductor during the charging phase is equal to the target average current for the charging phase; and current control circuitry configured to control a current through the inductor during a subsequent charging phase based on the crossing time.

An apparatus includes a first control circuit having an output and including a first comparator and a second control circuit coupled to the output of the first control circuit. The second control circuit includes a second comparator configured to: compare a first value to a reference frequency value, the first value indicating a frequency of a signal at the output of the first control circuit; and provide an adjustment value to change a hysteresis window of the first comparator.

A current detector circuit includes a current sense amplifier, coupled to a sense resistor, to receive a pair of input voltages and to output a first indicator signal responsive to a sensed input voltage difference produced by a sensed current passing through the sense resistor. The current detector circuit includes a comparator coupled to the current sense amplifier, the comparator to compare the first indicator signal to a reference voltage signal and output an interrupt signal responsive to the first indicator signal exceeding the reference voltage signal; and a reference voltage generator circuit coupled to the comparator, the reference voltage generator circuit to select the reference voltage signal from a plurality of reference voltages according to a first selector signal received from a configuration channel of a serial bus connector device.

To provide a hysteresis comparator having a small circuit area and low power consumption. The hysteresis comparator includes a comparator, a switch, a first capacitor, a second capacitor, and a logic circuit. A first terminal of the switch is electrically connected to one of a pair of conductive regions of the first capacitor, one of a pair of conductive regions of the second capacitor, and a first input terminal of the comparator. An output terminal of the comparator is electrically connected to an input terminal of the logic circuit. An output terminal of the logic circuit is electrically connected to the other of the pair of conductive regions of the second capacitor. The logic circuit has a function of generating an inverted signal of a signal input to the input terminal of the logic circuit and outputting the inverted signal to the output terminal of the logic circuit. A reference potential is input to the first input terminal of the comparator and the reference potential is held by the switch. Due to change in the potential of the output terminal of the comparator, the reference potential is changed by capacitive coupling of the second capacitor.