A Schmitt trigger circuit includes a first and second set of transistors, a first and second feedback transistor, and a first and second circuit. The first set of transistors is connected between a first voltage supply and an output node. The first voltage supply has a first voltage. The second set of transistors is connected between the output node and a second voltage supply. The second voltage supply has a second voltage. The first feedback transistor is connected to the output node, a first node and a second node. The second feedback transistor is connected to the output node, a third node and a fourth node. The first circuit is coupled to and configured to supply the second supply voltage to the second node. The second circuit is coupled to and configured to supply the first supply voltage to the fourth node.

An integrated circuit includes an input pad and a Schmitt trigger coupled to the input pad. The Schmitt trigger includes a first inverter and a second inverter. The Schmitt trigger includes a pull-up transistor coupled to an input of the second inverter and configure to supply a high reference voltage to the input of the second inverter.

Reference clock CMOS input buffer with self-calibration and improved ESD performance. In one embodiment, a reference clock input buffer of an image sensor includes a Schmitt trigger configured to generate a clock signal having a falling edge and a rising edge. The falling edge and the rising edge are separated by a hysteresis voltage. The Schmitt trigger includes a plurality of output switches and a plurality of voltage control switches that are individually coupled to individual output switches [M2-i] of the plurality of output switches. Voltage of the falling edge signal or the rising edge signal of the Schmitt trigger is adjustable by selectively switching at least one voltage control switch of the plurality of voltage control switches.

The present invention provides a Schmitt trigger circuit in which chattering does not occur in the output of the Schmitt trigger circuit even when it is connected to a communication bus without impedance matching and reflected noise is superimposed on the input signal. The Schmitt trigger circuit includes: a first signal detection circuit; a second signal detection circuit; a latch circuit; a selection signal generation circuit; a first input port; and a first output port. The first signal detection circuit is connected to the first input port, the latch circuit and the selection signal generation circuit. The second signal detection circuit is connected to the first input port, the latch circuit and the selection signal generation circuit. The latch circuit is connected to the selection signal generation circuit and the output port. The selection signal generation circuit includes a delay circuit.

The present invention provides a Schmitt trigger circuit in which chattering does not occur in the output of the Schmitt trigger circuit even when it is connected to a communication bus without impedance matching and reflected noise is superimposed on the input signal. The Schmitt trigger circuit includes: a first signal detection circuit; a second signal detection circuit; a latch circuit; a selection signal generation circuit; a first input port; and a first output port. The first signal detection circuit is connected to the first input port, the latch circuit and the selection signal generation circuit. The second signal detection circuit is connected to the first input port, the latch circuit and the selection signal generation circuit. The latch circuit is connected to the selection signal generation circuit and the output port. The selection signal generation circuit includes a delay circuit.

A method for determining the state of a piezoelectric element, in particular the piezoelectric element of a sensor apparatus, it is provided. The piezoelectric element is a component of a resonant circuit. The resonant circuit is excited to natural vibrations. The period durations of the natural vibrations of the resonant circuit are captured, and conclusions are drawn regarding the state of the piezoelectric element base on the period durations of the natural vibrations. A sensor apparatus with at least one piezoelectric element is provided. The sensor apparatus has at least one resonant circuit and that the piezoelectric element is a component of the resonant circuit. The sensor apparatus includes at least one evaluator for capturing and evaluating the natural vibrations of the resonant circuit. The evaluator includes at least one storage device for storing reference resonance frequencies that have been determined in advance.

A method for determining the state of a piezoelectric element, in particular the piezoelectric element of a sensor apparatus, it is provided. The piezoelectric element is a component of a resonant circuit. The resonant circuit is excited to natural vibrations. The period durations of the natural vibrations of the resonant circuit are captured, and conclusions are drawn regarding the state of the piezoelectric element base on the period durations of the natural vibrations. A sensor apparatus with at least one piezoelectric element is provided. The sensor apparatus has at least one resonant circuit and that the piezoelectric element is a component of the resonant circuit. The sensor apparatus includes at least one evaluator for capturing and evaluating the natural vibrations of the resonant circuit. The evaluator includes at least one storage device for storing reference resonance frequencies that have been determined in advance.

A low voltage single supply, ultra-low power sub hertz timer using a CMOS Schmitt trigger operating in sub-threshold region is presented. Sub-Hertz operation is achieved by controlling the amount of current for charging and discharging a capacitor at the control input of the Schmitt rather than by using large passive components. Pulse width modulation is achieved choosing the width per unit length parameters of transistors used in charging and discharging control blocks for the capacitor. The circuit uses a low supply voltage and can be designed for the higher voltages if required by specific applications. The circuit can produce sub-hertz oscillation with pulse width modulation. The capacitor has a small footprint compatible with integrated circuits. Power consumption is small with short ON times.

A low voltage single supply, ultra-low power sub hertz timer using a CMOS Schmitt trigger operating in sub-threshold region is presented. Sub-Hertz operation is achieved by controlling the amount of current for charging and discharging a capacitor at the control input of the Schmitt rather than by using large passive components. Pulse width modulation is achieved choosing the width per unit length parameters of transistors used in charging and discharging control blocks for the capacitor. The circuit uses a low supply voltage and can be designed for the higher voltages if required by specific applications. The circuit can produce sub-hertz oscillation with pulse width modulation. The capacitor has a small footprint compatible with integrated circuits. Power consumption is small with short ON times.

A trigger, includes: a first voltage input terminal; a bias voltage input terminal; a first bias transistor having a scaling of N to a first component of an external device; a comparator transistor having a scaling of N to a second component of the external device; a first switch transistor and a second switch transistor; a shunt transistor having a control terminal connected to the first voltage input terminal, a second terminal connected to the second terminal of the second switch transistor, and a first terminal connected to the first terminal of the comparator transistor. The shunt transistor has an enlarging scale of M to the comparator transistor. A voltage output terminal is respectively connected to the second terminal of the first switch transistor, the control terminal of the second switch transistor, and the second terminal of the comparator transistor.