Provided is a semiconductor device that includes a first conductivity type well region below a gate runner portion, wherein a diode region includes first contact portions, a first conductivity type anode region, and a second conductivity type cathode region; wherein the well region contacts the diode region in the first direction, and when an end of the well region, an end of at least one of first contact portions, and an end of the cathode region that face one another in the first direction are imaginary projected on an upper surface of the semiconductor substrate, a first distance is longer than a second distance, the first distance being a distance between the end of the well region and the end of the cathode region, and the second distance being a distance between the end of the well region and the end of the at least one first contact portion.

An input is coupled to a cathode of a laser diode having its anode coupled to a high-voltage-supply, with a cascoded current mirror having an input and output branches. The input branch is coupled between the high-voltage-supply and a sense resistor coupled to the input. The output branch is coupled between the high-voltage-supply and an output. A sense resistance is coupled between the output and ground, and includes a diode-coupled transistor coupled to the output and a resistor coupled between the diode-coupled transistor and ground. The input branch generates a current proportional to a voltage across the laser diode, and the output branch generates a mirrored current proportional to the current proportional to the voltage across the laser diode. A voltage proportional to the voltage across the laser diode is generated by the mirrored current flowing through the sense resistance. A comparison circuit compares this voltage to a threshold.

Systems, methods, techniques and apparatuses of power switches are disclosed. One exemplary embodiment is a power switch comprising a first semiconductor device and a second semiconductor device coupled together in a first anti-series configuration between a first terminal and a second terminal; a third semiconductor device and a fourth semiconductor device coupled together in a second anti-series configuration between the first terminal and the second terminal; a controller configured to operate the power switch to simultaneously conduct a first portion of a load current from the first terminal to the second terminal by closing the first semiconductor device and the second semiconductor device, and to conduct a second portion of the load current from the first terminal to the second terminal by closing the third semiconductor device and the fourth semiconductor device.

In a solid state switch (SSS) driver circuit for controlling a solid state switch operated as high side switch between a battery cell stack and a load, the SSS driver circuit includes: a voltage generation circuit; a switch off circuit; and a switch controller connected to a first output node and to a second output node, wherein the switch controller is configured to: receive a ground voltage via a third ground node, and a fourth control signal; and connect the first output node and a gate node of the solid state switch according to the fourth control signal.

An electromechanical motor vehicle power steering system having a multiphase, permanently excited electric motor via a controller and supply lines from an onboard power supply of a motor vehicle.

Provided is a semiconductor device that includes a first conductivity type well region below a gate runner portion, wherein a diode region includes first contact portions, a first conductivity type anode region, and a second conductivity type cathode region; wherein the well region contacts the diode region in the first direction, and when an end of the well region, an end of at least one of first contact portions, and an end of the cathode region that face one another in the first direction are imaginary projected on an upper surface of the semiconductor substrate, a first distance is longer than a second distance, the first distance being a distance between the end of the well region and the end of the cathode region, and the second distance being a distance between the end of the well region and the end of the at least one first contact portion.

A level-shifter includes an input node coupled to a laser driver input receiving a trigger signal, the input node receiving a signal indicating generation of a laser drive-pulse. A p-channel transistor has a source coupled to a supply node, a drain coupled to an output node, and a gate coupled to the input node. An n-channel transistor has a drain coupled to the drain of the p-channel transistor, a source coupled to ground, and a gate coupled to the input node. A first switch couples the input node to the output node. Another p-channel transistor has a source coupled to the supply node, a drain coupled to the output node by a second switch, and a gate coupled to the input node. The first switch closes and second switch opens when the signal is low, and the first switch opens and second switch closes when the signal is high.

An electronic circuit having a first terminal and a second terminal. The electronic circuit includes a first diode having a PN junction where a forward voltage is a first voltage, a second diode having a Schottky junction where the forward voltage is a second voltage that is smaller than the first voltage, a first wiring member coupling the first terminal to the second terminal via the first diode, and a second wiring member coupling the first terminal to the second terminal via the second diode. The second wiring member has an inductance larger than an inductance of the first wiring member.

An active clamp switching power converter circuit includes a primary-side sensing circuit that generates a sensed voltage based on an auxiliary winding voltage of an auxiliary winding around the core having a same polarity as the primary winding. Based on the sensed voltage, a controller controls switching of a power switch coupled to the primary winding to control current through the primary winding and controls switching of an active clamp switch to control leakage current when the power switch is turned off. The controller regulates timing of the switching to turn on the power switch based on timing of a zero voltage switching condition for power efficient operation.

An ultra-low clamping voltage Surge Protection Module (SPM) is disclosed which utilizes a depletion mode MOSFET (D MOSFET). The SPM may be part of a circuit or a device and includes a primary protection stage and a secondary protection stage, with the D MOSFET being connected between the two stages. The SPM may include a single D MOSFET, dual D MOSFETs, or multiple D MOSFETs and the primary and secondary protection stages may be implemented with a number of different components. The SPM using D MOSFET(s) exhibits improved surge protection over circuits using inductors.