An electronic device includes a semiconductor substrate and a bidirectional transistor switch formed on the substrate, the bidirectional switch including a first source node, a second source node and a common drain node. A first transistor is formed on the substrate and includes a first source terminal, a first drain terminal and a first gate terminal, wherein the first source terminal is connected to the substrate, the first drain terminal is connected to the first source node and the first gate terminal is connected to the second source node. A second transistor is formed on the substrate and includes a second source terminal, a second drain terminal and a second gate terminal, wherein the second source terminal is connected to the substrate, the second drain terminal is connected to the second source node and the second gate terminal is connected to the first source node.

Apparatus for performing substrate voltage management is provided herein and comprises an active substrate voltage management circuit configured to be coupled to a substrate of a bidirectional gallium nitride high electron mobility transistor comprising a first source and a second source. The active substrate voltage management circuit comprises a first circuit that is connected to the first source and a second circuit that is connected to a second source such that when the bidirectional gallium nitride high electron mobility transistor is operational one of the first circuit or the second circuit connects one of the first source to the substrate or the second source to the substrate, respectively, to control a bias voltage applied to the substrate.

In some method and apparatus embodiments, an RF circuit comprises a switch transistor having a source, a drain, a gate, and a body. A gate control voltage is applied to the gate of the switch transistor. A body control voltage is applied to the body of the switch transistor. The body control voltage is a positive bias voltage when the switch transistor is in an on state. In some embodiments, an RF circuit comprises a control voltage applied to the gate of the switch transistor through a first resistance and applied to the body of the switch transistor through a second resistance. The first resistance is different from the second resistance.

A radio frequency (RF) switch includes a first terminal, a second terminal, a series switch circuit, a shunt switch circuit, an inductor and a reference voltage terminal. An RF signal at the first terminal. The series switch circuit is coupled to the first terminal, the second terminal, and the shunt switch circuit. The shunt switch circuit includes a sub-switch circuit, a transistor coupled to the sub-switch circuit, and a compensation capacitor parallel-coupled to the transistor. The inductor is coupled to the shunt switch circuit and the reference voltage terminal. When the RF signal is operated in a first frequency band, the first transistor is turned on for the shunt switch circuit and the inductor to provide a first impedance. When the RF signal is operated in a second frequency band, the first transistor is turned off for the shunt switch circuit and the inductor to provide a second impedance.

An electric machine with variable torque generation having a tunable Halbach array configuration. The electric machine includes a magnet assembly for generating a magnetic field. The magnet assembly includes a plurality of fixed magnets disposed in a ring arrangement so that fixed magnets having a north pole faced toward the rotor or stator are alternated with fixed magnets having a south pole faced toward the rotor or stator, a plurality of rotatable magnets disposed within a respective slot formed between two adjacent fixed magnets, a drive assembly for turning the rotatable magnets within the slots to vary the magnetic field generated by the magnet assembly in the rotor or stator, the drive assembly configured to turn the rotatable magnets between a first position wherein the magnetic field in the rotor or stator is augmented and a second position wherein the magnetic field in the rotor or stator is cancelled.

A switch device includes an output transistor, an overcurrent protection circuit configured to be capable of performing an overcurrent protection operation in which magnitude of target current flowing in the output transistor is limited to a predetermined upper limit current value or less, and a control circuit configured to be capable of controlling a state of the output transistor and capable of changing the upper limit current value among a plurality of current values including a predetermined first current value and a predetermined second current value less than the first current value. The control circuit can limit the magnitude of the target current to the first current value or less in response to the magnitude of the target current reaching the first current value, and then change the upper limit current value to the second current value.

Methods, apparatus, systems, and articles of manufacture are disclosed for a multi-level turn-off circuit. An example power delivery circuit includes a two-level turn-off circuit to be coupled to a first switch to reduce a first gate voltage of the first switch from a first voltage to a second voltage when a current flowing through the first switch is greater than an over-current threshold, the two-level turn-off circuit including a second switch, a voltage-current-voltage buffer to reduce a second gate voltage of the second switch from a third voltage to a fourth voltage, and a comparator circuit to turn off the second switch when the second gate voltage is the fourth voltage, and a driver to be coupled to the first switch to turn off the first switch when the second gate voltage is the fourth voltage.

A driver circuit is provided. The driver circuit comprises a power transistor and a gate driver circuit arrangement. The driver circuit is integrated in a package. In addition, the driver circuit comprises a terminal for an external transistor. The external transistor and the power transistor are controlled by the gate driver circuit arrangement in a mutually corresponding manner.

The present invention provides a driving circuit for a driving hip. The driving circuit includes a bootstrap circuit with a bootstrap voltage terminal. A power terminal of a high-voltage driving circuit is connected to the bootstrap voltage terminal, and a ground terminal of the high-voltage driving circuit is connected to a regulating terminal. A high-side drive circuit includes a high-side pull-up circuit and a high-side pull-down circuit. The driving circuit includes: an auxiliary power terminal; a mirror current source an input terminal of the mirror current source being connected to the bootstrap voltage terminal; a first MOS transistor; a second MOS transistor an equivalent diode component, an output terminal of the second MOS transistor being connected to the regulating terminal through the equivalent diode component; and an equivalent resistance component, the gate of the first MOS transistor being connected to the regulating terminal through the equivalent resistance component.

According to an aspect, there is provided an apparatus comprising: a bulk-controlled switch circuit comprising a first transistor coupled to a load and having a source coupled to a source voltage and a drain coupled to a drain voltage, a second transistor and a third transistor coupled, in parallel with the first transistor, to one another in series between the source voltage and the drain voltage, wherein a bulk of the first transistor is coupled with bulks of the second transistor and the third transistor, wherein a gate of the second transistor is coupled to the source voltage via a first impedance circuit and a gate of the third transistor is coupled to the drain voltage via a second impedance circuit to form a comparator switch controlled by the source voltage and the drain voltage and to dynamically switch a greater one of the source voltage and the drain voltage to the load; a first current generator circuit and a second current generator circuit; a first current mirror circuit biased by the first current generator circuit, responsive to the source voltage, and configured to trigger the second transistor to couple the source voltage to the load when the source voltage is above the drain voltage; a second current mirror circuit biased by the second current generator circuit, responsive to the drain voltage, and configured to trigger the third transistor to couple the drain voltage to the load when the drain voltage is above the source voltage.