Methods and devices to drive D-mode and E-mode power FETs are described. The disclosure teaches how to apply negative voltages across gate-source of D-mode FETs to turn such FETs off whenever needed. The presented method and devices can also be used in applications where overdriving D-mode FETs to achieve improved on resistance is desired.

A power converter includes a charge pump in which transistors transition between conducting and non-conducting states thereby causing said pump capacitors to be interconnected in different arrangements at different times. Among the transistors is one that transitions into a conducting state when a source and gate of that transistor are at equal potentials.

A semiconductor device includes a normally-off power transistor integrated in a semiconductor die and a first failsafe pulldown circuit. A gate of the normally-off power transistor is electrically connected to a control terminal of the semiconductor die. The first failsafe pulldown circuit includes a first normally-on pulldown transistor integrated in the semiconductor die and a turn-off time control circuit. A gate of the first normally-on pulldown transistor is electrically connected to a first reference terminal of the semiconductor die. The first normally-on pulldown transistor is configured to pull down the gate of the normally-off power transistor to a voltage below a threshold voltage of the normally-off power transistor when no voltage is applied across the control terminal and the first reference terminal. The turn-off time control circuit is configured to control a turn-off time of the normally-off power transistor.

The present disclosure concerns a method and a circuit for controlling first and second switches electrically in series, wherein one or a plurality of crossings of a voltage threshold by a voltage across the first switch cause a conductive state of the second switch.

A circuit includes an electronic component package that comprises a first lead, a second lead, and a third lead; and a III-N transistor encased in the electronic component package, the III-N transistor including a drain, a gate, and a source, where the source is coupled to the first lead, the gate is coupled to the second lead, and the drain is coupled to the third lead. The circuit includes a high voltage node and a resistor, the resistor having a first terminal coupled to the high voltage node and a second terminal coupled to the third lead. The circuit further includes a ferrite bead connected in parallel to the resistor and coupled between the third lead and the high voltage node. When switching, the deleterious effects of a parasitic inductance of the circuit's power loop are mitigated by the ferrite bead and the resistor.

Power semiconductor devices in GaN technology include an integrated auxiliary (double) gate terminal and a pulldown network to achieve a normally-off (E-Mode) GaN transistor with threshold voltage higher than 2V, low gate leakage current and enhanced switching performance. The high threshold voltage GaN transistor has a high-voltage active GaN device and a low-voltage auxiliary GaN device wherein the high-voltage GaN device has the gate connected to the source of the integrated auxiliary low-voltage GaN transistor and the drain being the external high-voltage drain terminal and the source being the external source terminal, while the low-voltage auxiliary GaN transistor has the gate (first auxiliary electrode) connected to the drain (second auxiliary electrode) functioning as an external gate terminal. A pull-down network for the switching-off of the high threshold voltage GaN transistor may be formed by additional auxiliary low-voltage GaN transistors and resistive elements connected with the low-voltage auxiliary GaN transistor.

An apparatus includes a capacitive device configured to provide bias power for a high-side switch, a gate drive path having variable resistance connected between the capacitive device and a gate of the high-side switch, wherein the gate drive path having variable resistance is of a first resistance value in response to a turn-on of the high-side switch, and the gate drive path having variable resistance is of a second resistance value in response to a turn-off of the high-side switch, and wherein the second resistance value is greater than the first resistance value, and a control switch connected between the gate of the high-side switch and ground.

An apparatus comprises an energy transfer device that operates one or more input switches of an input side of an electrical isolation device to transfer energy through the isolation device to an output side of the electrical isolation device for activating a switch. The apparatus comprises a voltage conversion device that converts the energy from an input voltage of the input side to an output voltage to control the switch when the energy transfer is active. The apparatus comprises a passive turn off device that passively deactivates the switch when the energy transfer is inactive. The passive turn off device is disabled from deactivating the switch when the energy transfer is active.

A power circuit switching device comprises two switching terminals, a high-voltage depletion mode transistor and a low-voltage enhancement mode transistor arranged in series between the two switching terminals, a first terminal for receiving a switching signal and electrically connected via a driver circuit to the gate of the high-voltage transistor, and a second terminal for receiving a control signal and electrically connected to the gate of the low-voltage transistor. The device comprises a normally-on protection circuit electrically connected between the second terminal and the gate of the high-voltage transistor to keep the high-voltage transistor in an off-state when the driver circuit is not electrically powered.

A semiconductor module includes: a semiconductor substrate; a switching element having a first electrode, a second electrode, and a gate electrode, and the switching element configured to perform turning on/off between the first electrode and the second electrode in response to applying of a predetermined gate voltage to the gate electrode; a control circuit part configured to control the gate voltage; and a current detection element configured to detect a current which flows between the first electrode and the second electrode of the switching element, wherein the switching element, the control circuit part, and the current detection element are mounted on the semiconductor substrate, and the current detection element is formed of a Rogowski coil.