Semiconductor device with multiple independent gates. A gate-controlled semiconductor device includes a first plurality of cells of the semiconductor device configured to be controlled by a primary gate, and a second plurality of cells of the semiconductor device configured to be controlled by an auxiliary gate. The primary gate is electrically isolated from the auxiliary gate, and sources and drains of the semiconductor device are electrically coupled in parallel. The first and second pluralities of cells may be substantially identical in structure.

A radio frequency switch is disclosed. The RF switch uses a combination of transistor technology and a topology to create an RF switch that has a high isolation and a high voltage breakdown at frequencies including those above a gigahertz.

A semiconductor device that can perform product-sum operation with low power is provided. The semiconductor device includes a switching circuit. The switching circuit includes first to fourth terminals. The switching circuit has a function of selecting one of the third terminal and the fourth terminal as electrical connection destination of the first terminal, and selecting the other of the third terminal and the fourth terminal as electrical connection destination of the second terminal, on the basis of first data. The switching circuit includes a first transistor and a second transistor each having a back gate. The switching circuit has a function of determining a signal-transmission speed between the first terminal and one of the third terminal and the fourth terminal and a signal-transmission speed between the second terminal and the other of the third terminal and the fourth terminal on the basis of potentials of the back gates. The potentials are determined by second data. When signals are input to the first terminal and the second terminal, a time lag between the signals output from the third terminal and the fourth terminal is determined by the first data and the second data.

A device includes a heterojunction device, a unipolar power transistor operatively connected in series with said hetero junction device; an external control terminal for driving said unipolar power transistor and said heterojunction device; and an interface unit having a plurality of interface terminals. A first interface terminal is operatively connected to an active gate region of the heterojunction device and a second interface terminal is operatively connected to said external control terminal. The heterojunction device includes a threshold voltage less than a threshold voltage of the unipolar power transistor, wherein the threshold voltage of the heterojunction device is less than a blocking voltage of the unipolar power transistor.

According to one embodiment, an electronic circuit includes a plurality of first transistors, a control circuit, a sample hold circuit and a calculation circuit. The control circuit selectively performs a first operation and a second operation, the first operation supplying a driving control signal to a gate terminal of a semiconductor switching element using the plurality of first transistors, and the second operation supplying a pulse current for measurement to the gate terminal using part of the plurality of first transistors. The sample hold circuit samples a voltage of the gate terminal during a period in which the pulse current is supplied to the gate terminal in the second operation. The calculation circuit calculates a gate resistance of the semiconductor switching element based on the sampled voltage.

A power conversion apparatus includes positive-side and negative-side switching elements, positive-side and negative-side gate drive circuits, and a gate signal controller. The positive-side switching element is disposed between a positive-side direct-current bus and an output node. The negative-side switching element is disposed between a negative-side direct-current bus and the output node. The positive-side and negative-side gate drive circuit are configured to turn on and off the positive-side and negative-side switching elements, respectively. The gate signal controller is configured to transmit to the positive-side and negative-side gate drive circuits gate signals to instruct turning on and off the positive-side and negative-side switching elements. The gate signal controller is configured to, when a short circuit between the positive-side direct-current bus and the negative-side direct-current bus is detected, transmit to the positive-side gate drive circuit a first gate signal and transmit to the negative-side gate drive circuit a second gate signal.

A bidirectional heterojunction transistor includes first and second conduction electrodes, first and second gates between the conduction electrodes, and first and second reference electrodes between the gates. The transistor further includes a superposition of semiconductor layers, including channel zones that are vertically in line with the gates, a first conduction zone between the first conduction electrode and the first channel zone, and a second conduction zone between the second conduction electrode and the second channel zone. The superposition of semiconductor layers also includes a third conduction zone that is separated from the first and second conduction zones by the first and second channel zones, respectively, and a first electrical connection that is connected to the third conduction zone and to the first reference electrode.

A transmitting device of the present disclosure includes: a voltage generator that generates a predetermined voltage; a first driver including a first sub-driver and a second sub-driver, the first dub-driver that includes a first switch provided on a path from a first power source to a first output terminal, a second switch provided on a path from a second power source to the first output terminal, and a third switch provided on a path from the voltage generator to the first output terminal, and is allowed to set a voltage state of the first output terminal to any of a predetermined number of voltage states which are three or more voltage states, and the second sub-driver that is allowed to adjust a voltage in each of the voltage states of the first output terminal; and a controller that controls an operation of the first driver to perform emphasis.

A radio frequency switch is disclosed. The RF switch uses a combination of transistor technology and a topology to create an RF switch that has a high isolation and a high voltage breakdown at frequencies including those above a gigahertz.

In accordance with an embodiment, a method includes switching on a transistor device by generating a first conducting channel by driving a first gate electrode and, before generating the first conducting channel, generating a second conducting channel by driving a second gate electrode, wherein the second gate electrode is adjacent the first gate electrode in a current flow direction of the transistor device.