An element includes a coupling line in which a first conductor layer, a dielectric layer, and a second conductor layer are stacked in this order, and which is connected to the second conductor layer in order to mutually synchronize a plurality of antennas at a frequency of a terahertz wave; and a bias line connecting a power supply for supplying a bias signal to a semiconductor layer and the second conductor layer. A wiring layer in which the coupling line is formed and a wiring layer in which the bias line is formed are different layers. The bias line is disposed in a layer between the first conductor layer and the second conductor layer.

Systems and methods involving phase-locked-loop (PLL) circuitry are disclosed. In one illustrative implementation, a PLL circuit device may comprise voltage controlled oscillator (VCO) circuitry having a bias signal that sets a frequency range, circuitry that shifts the VCO circuitry to operate in one of the frequency ranges, and other circuitry to compare/calibrate signals and/or set the bias current. According to further implementations, as a function of operation of the circuitry, an operating frequency range of the VCO circuitry may be shifted to a different operating frequency range, and closed-loop, continuous frequency range, auto-calibration or other features may be provided.

Systems and methods involving phase-locked-loop (PLL) circuitry are disclosed. In one illustrative implementation, a PLL circuit device may comprise voltage controlled oscillator (VCO) circuitry having a bias signal that sets a frequency range, circuitry that shifts the VCO circuitry to operate in one of the frequency ranges, and other circuitry to compare/calibrate signals and/or set the bias current. According to further implementations, as a function of operation of the circuitry, an operating frequency range of the VCO circuitry may be shifted to a different operating frequency range, and closed-loop, continuous frequency range, auto-calibration or other features may be provided.

Provided herein are apparatus and methods for phase-locked loops (PLLs). In certain configurations, a clock system includes a PLL, a control circuit, and a holdover circuit that is electrically coupled to an input of the PLL's loop filter via a holdover switch and a variable resistor. The control circuit generates an input clock signal for the PLL based on a selected reference clock signal. When the control circuit determines that the selected reference clock signal is unreliable, the control circuit disables the PLL's feedback loop and turns on the holdover switch. After the selected reference clock signal is changed or otherwise becomes reliable, the control circuit enables the PLL's feedback loop while keeping the holdover switch turned on, and controls a resistance of the variable resistor over time to provide a soft transition from holdover to reacquiring phase lock.

The present disclosure relates to a method for demodulating a modulated signal and a receiver. The receiver comprises: a phase detector with a first and second input, the first input being adapted to receive a modulated input signal; a comparator comprising an input coupled to an output of the phase detector; a frequency-offset cancellation block comprising an input coupled to an output of the comparator. The receiver includes a digitally controlled oscillator comprising: a control input coupled to an output of the comparator and an output of the frequency-offset cancellation block; and an output coupled to the second input of the phase detector.

The present invention relates to a voltage controlled oscillator and phase locked loop comprising the same for compensating a noise of a power voltage. According to an embodiment of the present invention, a voltage controlled oscillator may comprise: an oscillator comprising a plurality of inverters connected as a ring form for generating a plurality of signals having different phases with each other, and a plurality of feed forward circuits formed between the inverters; and a controller for controlling the inverter and feed forward circuit based on a detected noise by detecting a noise of a power voltage.

The invention provides a power system for monitoring a working environment of a monitored circuit and adjusting a working voltage of the monitored circuit includes: a power circuit, a voltage-controlled oscillator and a counter. The power circuit is configured to output the working voltage to the monitored circuit through a power supply path. The voltage-controlled oscillator is disposed in or around the monitored circuit and is electrically connected to the power supply path and a ground path to which the monitored circuit is electrically connected, and is configured to output an oscillation frequency in accordance with a signal variation on the power supply path and the ground path. The counter is electrically connected to the voltage-controlled oscillator and is configured to generate a counting number signal in accordance with the oscillation frequency and a synchronizing signal, thereby adjusting the working voltage outputted to the monitored circuit.

A phase-locked loop circuit, which includes a phase frequency detector, a charge pump, a loop low-pass filter, a first voltage-current converter, a second voltage-current converter, a current-controlled oscillator, a frequency divider, a comparator, and a mode controller, where the mode controller is configured to control the switches S1, S2, and S3 included in the loop low-pass filter to connect or disconnect. Using the phase-locked loop circuit, a voltage value of a second control voltage signal VC2 provided for the first voltage-current converter can reach, in a relatively short time, a voltage value of a first control voltage signal VC1 provided for the second voltage-current converter, thereby increasing a speed of establishing the phase-locked loop circuit and implementing a quick response of the phase-locked loop circuit.

Systems and methods involving phase-locked-loop (PLL) circuitry are disclosed. In one illustrative implementation, a PLL circuit device may comprise voltage controlled oscillator (VCO) circuitry having a bias signal that sets a frequency range, circuitry that shifts the VCO circuitry to operate in one of the frequency ranges, and other circuitry to compare/calibrate signals and/or set the bias current. According to further implementations, as a function of operation of the circuitry, an operating frequency range of the VCO circuitry may be shifted to a different operating frequency range, and closed-loop, continuous frequency range, auto-calibration or other features may be provided.

A method of generating an output signal includes determining a sampling period N according to a number of most significant bits (MSBs) of a divider number control signal. The method also includes determining a first logic value of a control signal by a comparing circuit based on the sampling period N, and generating a coarse tuning signal by a code generating circuit based on a phase difference signal and the control signal. When an M-th least significant bit (LSB) of the number of MSBs of the divider number control signal equals a second logic value, the sampling period N is set based on the M-th LSB of the number of MSBs of the divider number control signal.