A phase-locked loop circuit, which includes a phase frequency detector, a charge pump, a loop low-pass filter, a first voltage-current converter, a second voltage-current converter, a current-controlled oscillator, a frequency divider, a comparator, and a mode controller, where the mode controller is configured to control the switches S1, S2, and S3 included in the loop low-pass filter to connect or disconnect. Using the phase-locked loop circuit, a voltage value of a second control voltage signal VC2 provided for the first voltage-current converter can reach, in a relatively short time, a voltage value of a first control voltage signal VC1 provided for the second voltage-current converter, thereby increasing a speed of establishing the phase-locked loop circuit and implementing a quick response of the phase-locked loop circuit.

The present disclosure relates to a deadlock recovery unit for applying a one-shot pulse signal to restart a Voltage Controlled Oscillator (VCO) when the output clock signal of the VCO remains in a high state or a low state. The deadlock recovery unit includes a VCO clock monitoring unit for monitoring a clock signal of a voltage control oscillator; a pulse signal generating unit for outputting a one-shot pulse signal to reset the VCO when a clock signal is not counted; and a control signal generating unit for generating a VCO counter enable signal applied to the VCO clock monitoring unit and a detector clock signal applied to the pulse signal generating unit by using an externally supplied reference clock signal.