A signal processing circuit for a gyroscope apparatus is disclosed. The signal processing circuit includes a first electrode and a second electrode pairing with the first electrode. The signal processing circuit, being a negative feedback loop circuit, is configured to be connected with the first electrode and the second electrode and comprises a demodulator configured to convert a current from the first electrode into a voltage and demodulate the converted voltage to output a demodulated signal, an analog-to-digital converter configured to convert the demodulated signal from the demodulator into a digital signal, a proportional-integral-derivative controller that is connected to the analog-to-digital converter, a digital-to-analog converter configured to convert an output signal from the proportional-integral-derivative controller to an analog signal, and a modulator configured to be electrically connected with the second electrode and to be electrically connected with the digital-to-analog converter.

A system and method of acquiring an image at a magnetic resonance imaging (MRI) system is provided. Accordingly, an analog signal based on a pulse sequence and a first gain is obtained. The analog signal is converted into a digitized signal. A potential quantization error is detected in the digitized signal based on a boundary. When the detection is affirmative, a replacement analog signal based on the pulse sequence is received. At least one portion of the replacement analog signal can be based on an adjusted gain. The adjusted gain is a factor of the first gain. The replacement analog signal is digitized into a replacement digitized signal. At least one portion of the replacement digitized signal corresponding to the at least one portion of the replacement analog signal is adjusted based on a reversal of the factor.

The present technology provides a beam forming device for performing both analog beam forming and analog-to-digital conversion. The present invention provides a probe having a beam forming device therein, and a system comprising the same. A beam forming device, according to the present technology, comprises: a signal storage circuit configured to receive the plurality of analog signals to store the analog beam signal corresponding to a combination of the plurality of analog signals; and a control circuit configured to control the signal storage circuit so that the signal storage circuit receives the plurality of analog signals and stores the analog beam signal, to generate a digital signal corresponding to the analog beam signal and to control the signal storage circuit so that an output voltage of the signal storage circuit is updated while the digital signal is being generated.

A Sigma-Delta analog to digital converter (ADC) is described. The Sigma-Delta ADC includes a series arrangement of a gain tracker, a first discrete-time integrator stage and a quantizer between an ADC input and an ADC output. The Sigma-Delta ADC includes a digital to analog converter (DAC) having a DAC input and a DAC output connected to the gain tracker. The Sigma-Delta analog to digital converter includes a controller having a control input connected to the quantizer output. The controller provides a digital input to the DAC input and provides a gain control signal to the gain tracker.

An apparatus include one or more DACs and a resistor divider are configured to generate a variable bias voltage V.sub.BIAS with respect to a CM voltage V.sub.CM. The CM voltage V.sub.CM is applied to a cathode of one or more thermopiles or a negative input of one or more amplifiers to prevent saturation and over range of one or more low voltage readout amplifiers and one or more ADCs.

A wireless receiver including a gain network that adjusts a gain of a received wireless signal and provides an RF signal, a level detector that provides a level indication while a strength of the RF signal is at least an RF level threshold, a timing system that provides a timing value indicative of a total amount of time that the level indication is provided during a timing window, a gain up disable circuit that provides a gain up disable signal when the timing value reaches a low threshold, a blocker strength detect circuit that provides a gain down request signal when the timing value reaches a high threshold, and an AGC circuit that does not increase the gain of the gain network while the gain up disable signal is provided, and that allows a reduction of the gain of the gain network while the gain down request signal is provided.

A semiconductor device has an A/D converter configured to convert an analog signal representing a current flowing in a control target into a digital signal, an overcurrent determination unit configured to, based on the analog signal, determine that an overcurrent has occurred in the control target when the current flowing in the control target has exceeded an overcurrent threshold, and determine that the overcurrent has not occurred in the control target when the current flowing in the control target has not exceeded the overcurrent threshold, a drive control signal generation unit configured to generate a drive control signal for controlling driving of the control target so that the current flowing in the control target is equal to a target current, based on a conversion result of the A/D converter, and generate the drive control signal to reduce the current flowing in the control target when the overcurrent determination unit determines that the overcurrent has occurred, and an overcurrent threshold setting unit configured to set the overcurrent threshold based on the conversion result of the A/D converter and the target current.

The trend in wireless communication receivers is to capture more and more bandwidth to support higher throughput, and to directly sample the radio frequency (RF) signal to enable re-configurability and lower cost. Other applications like instrumentation also demand the ability to digitize wide bandwidth RF signals. These applications benefit from input circuitry which can perform well with high speed, wide bandwidth RF signals. An input buffer and bootstrapped switch are designed to service such applications, and can be implemented in 28 nm complementary metal-oxide (CMOS) technology.

A circuit configured to sense an input analog signal generated by a sensor at a first frequency and to generate an output digital signal indicative of the sensed input analog signal. The circuit includes a conditioning circuit, an ADC, a feedback circuit, and a low-pass filter. The conditioning circuit is configured to receive the input analog signal and to generate a conditioned analog signal. The ADC is configured to provide a converted digital signal based on the conditioned analog signal. The feedback circuit includes a band-pass filter configured to selectively detect a periodic signal at a second frequency higher than the first frequency and to act on the conditioning circuit to counter variations of the periodic signal at the second frequency. The low-pass filter is configured to filter out the periodic signal from the converted digital signal to generate the output digital signal.

An image sensor includes a pixel that includes a photoelectric conversion element converting an incident light to an electrical signal, a switch adjusting a capacitance of a floating diffusion (FD) node at which charges corresponding to the electrical signal are stored, and a readout circuit outputting an output voltage based on the FD node. An A/D converter may sample the output voltage transferred from the readout circuit through an output line respectively at a first time and a second time and generate a digital code based on a difference therebetween. A conversion gain controller may generate a conversion gain control signal by comparing the output voltage transferred from the readout circuit through the output line with a threshold voltage at a third time between the first and second times and provide the conversion gain control signal to the switch to set conversion gain of the pixel.