Disclosed is a successive approximation algorithm-based ADC self-correcting circuit, comprising: a coding circuit, a voltage dividing resistor string, a comparator array, a multi-path selection switch, a first digital-to-analog converter, a reference circuit, a control register, and a data register; an input end of the coding circuit is connected to an output end of the comparator array; a positive-phase input end of each comparator in the comparator array is connected to a mobile end of the multi-path selection switch; a negative-phase input end of each comparator in the comparator array is correspondingly connected between each two neighboring resistors in the voltage dividing resistor string; an enabling end of the comparator array is connected to the control register; a first immobile end of the multi-path selection switch is used for receiving an analog signal, a second immobile send is connected to an output end of the first digital-to-analog converter, and a control end is connected to the control register; the reference circuit is connected to the voltage dividing resistor string and the comparator array for use to correct an intermediate level and voltage range of the voltage dividing resistor string to be consistent with that of the output of the first digital-to-analog converter.

A comparator circuit is applied to comparing an input voltage and a reference voltage to generate a comparison result. The comparator circuit includes a resistor circuit, a current source circuit and a transistor switching circuit. The resistor circuit receives first and second input voltages in the input voltage. The current source circuit provides a first current and a second current, and the first current, the second current and the resistor circuit generate the reference voltage. The transistor switching circuit generates the comparison result at its output end according to a first control voltage and a second control voltage at its input end. The current source circuit and the resistor circuit generate the first control voltage according to the first current and the first input voltage, and generate the second control voltage according to the second current and the second input voltage.

A high-speed and high-precision photonic analog-to-digital conversion device capable of realizing intelligent signal processing. Learning ability of deep learning technology is utilized to learn the nonlinear response and channel mismatch effect of the system and configure optimal parameters of the deep network. Deterioration of photonic analog-to-digital conversion system performance caused by nonlinear distortion and channel mismatch distortion is eliminated in real time, and performance indicators thereof are improved. By using the induction and deduction ability of deep learning technology, intelligent signal processing of the input signal is realized, and users are provided with digital signals that meet the requirements. It's important for improving the performance of microwave photonic systems that require high sampling rate, high time precision, and high sampling accuracy, such as microwave photonic radar and optical communication systems, and also critical to improve the signal processing ability of such systems under complex conditions.

An analog-to-digital converter including a first stage and a second stage. The first stage includes a first sample-and-hold (SH) having an input coupled to a voltage input node of the ADC, and having a first SH output. The first stage also includes a buffer, a first flash converter and a first digital-to-analog converter (DAC). The buffer has an input coupled to the first SH output and has a buffer output. The first flash converter has an input coupled to the first SH output, and has a first flash converter output. The first DAC has an input coupled to the first flash converter output. The second stage includes a second flash converter having an input coupled to the buffer output.

A gain calibration device for an ADC residue amplifier includes a DAC and a flash ADC. The DAC is configured to convert the digital signal to an analog signal, and the DAC includes a calibration module used in the gain calibration of the ADC residual amplifier. The flash ADC is configured to generate a digital signal, the flash ADC includes a plurality of comparators, the total number of the plurality of comparators is equal to the number of output bits of the flash ADC, and the comparators are configured to be unevenly distributed in an input range.

A system has a digital-to-analog converter; a reference signal coupled to the digital-to-analog converter; a differential amplifier for applying gain, and for generating output signals as a function of sampled input signals, the reference signal, digital codes, and the gain applied by the differential amplifier coupled to the digital-to-analog converter; and a multi-bit successive-approximation register for determining the digital codes in successive stages coupled to the differential amplifier; and the gain applied by the differential amplifier is corrected based on previously determined digital codes.

A D/A conversion circuit includes: an output terminal connected to an operational amplifier connected to a quantization circuit; a DAC capacitor; a selection switch switching among reference, first and second voltages to apply to the DAC capacitor as an analog potential; a ground switch connecting the DAC capacitor to a ground; and an output switch connecting the DAC capacitor to the output terminal. In a first period, the selection switch selects one of the reference, first and second voltages according to a quantization result value from the quantization circuit, and connects the one to the DAC capacitor, and the ground switch turns on to charge the DAC capacitor. In a second period, the selection switch selects another one of the first and second voltages, and connects the another one to the DAC capacitor, and the output switch turns on to output the analog potential to the output terminal.

Described herein are novel biological converter switches that utilize modular components, such as genetic toggle switches and single invertase memory modules (SIMMs), for converting analog inputs to digital outputs, and digital inputs to analog outputs, in cells and cellular systems. Flexibility in these biological converter switches is provided by combining individual modular components, i.e., SIMMs and genetic toggle switches, together. These biological converter switches can be combined in a variety of network topologies to create circuits that act, for example, as switchboards, and regulate the production of an output product(s) based on the combination and nature of input signals received.

An analog-to-digital converter circuit comprises code-shuffling circuitry, a plurality of digital-to-analog converter circuits, a plurality of difference circuits, and a plurality of latch circuits. The code-shuffling circuitry is operable to shuffle a plurality of digital codes among a plurality of its outputs. The plurality of digital-to-analog converter circuits are operable to convert a digital code on the respective one of the outputs to a corresponding one of a plurality of analog reference voltages. The plurality of difference circuits is operable to generate a respective one of a plurality of difference signals corresponding to a difference between an input voltage and a respective one of the plurality of reference voltages. The plurality of latch circuits is operable to latch a respective one of the plurality of difference signals to a corresponding one of a plurality of digital values.

Methods and systems are provided for circuits. One method is for increasing device threshold voltage distribution of a plurality of devices of a circuit. The method includes adjusting a device threshold voltage of the plurality of devices by different amounts; and selecting a subset of the plurality of devices with adjusted device threshold voltage by a device selection module for performing a function associated with the circuit. In one aspect, a system for device threshold voltage adjustment is provided. The system includes a sensor module for sensing one or more of temperature and voltage values of a die having a plurality of devices for a circuit; and a threshold temperature and voltage compensation module for receiving an input value from the sensor module to compensate variation in a device threshold voltage caused by changes of one or more of temperature and voltage of the die.