An A/D converter includes multiple bin comparators that compare an analog voltage to corresponding bin threshold voltages to provide output signals for providing corresponding comparison results. Some of the comparators includes enable inputs that selectively enable the output signal of the bin comparator to provide the corresponding comparison result based on a corresponding comparison result from at least one other bin comparator. The A/D convertor includes an encoder that utilizes the output signals to provide encoded bit values of the digital output. The A/D converter includes a bin selection circuit that utilizes the output signals to select a voltage level based on the output signals and provides the selected voltage level to a next stage of the A/D convertor. The next stage uses the selected voltage level and the analog voltage to provide at least one lessor bit of the digital output.

An analog to digital converter comprises an input for receiving an analog input signal; a plurality of outputs for outputting parallel bits of a digital signal that represents said analog input signal; and a neural network layer providing connections between each of said outputs respectively, each connection having an adjustable weighting. The synapses of the neural networks may be memristors and training may use online gradient descent.

An A/D converter includes multiple bin comparators that compare an analog voltage to corresponding bin threshold voltages to provide output signals for providing corresponding comparison results. Some of the comparators includes enable inputs that selectively enable the output signal of the bin comparator to provide the corresponding comparison result based on a corresponding comparison result from at least one other bin comparator. The A/D convertor includes an encoder that utilizes the output signals to provide encoded bit values of the digital output. The A/D converter includes a bin selection circuit that utilizes the output signals to select a voltage level based on the output signals and provides the selected voltage level to a next stage of the A/D convertor. The next stage uses the selected voltage level and the analog voltage to provide at least one lessor bit of the digital output.

A D/A conversion circuit includes: an output terminal connected to an operational amplifier connected to a quantization circuit; a DAC capacitor; a selection switch switching among reference, first and second voltages to apply to the DAC capacitor as an analog potential; a ground switch connecting the DAC capacitor to a ground; and an output switch connecting the DAC capacitor to the output terminal. In a first period, the selection switch selects one of the reference, first and second voltages according to a quantization result value from the quantization circuit, and connects the one to the DAC capacitor, and the ground switch turns on to charge the DAC capacitor. In a second period, the selection switch selects another one of the first and second voltages, and connects the another one to the DAC capacitor, and the output switch turns on to output the analog potential to the output terminal.

Disclosed is a successive approximation algorithm-based ADC self-correcting circuit, comprising: a coding circuit, a voltage dividing resistor string, a comparator array, a multi-path selection switch, a first digital-to-analog converter, a reference circuit, a control register, and a data register; an input end of the coding circuit is connected to an output end of the comparator array; a positive-phase input end of each comparator in the comparator array is connected to a mobile end of the multi-path selection switch; a negative-phase input end of each comparator in the comparator array is correspondingly connected between each two neighboring resistors in the voltage dividing resistor string; an enabling end of the comparator array is connected to the control register; a first immobile end of the multi-path selection switch is used for receiving an analog signal, a second immobile send is connected to an output end of the first digital-to-analog converter, and a control end is connected to the control register; the reference circuit is connected to the voltage dividing resistor string and the comparator array for use to correct an intermediate level and voltage range of the voltage dividing resistor string to be consistent with that of the output of the first digital-to-analog converter.

A photonic monobit analog-to-digital converter (ADC) includes an incoherent optical source configured to generate an optical noise signal, an optical modulator, at least one coupler, a photodetector, a limiter, and a DSP. The optical modulator is configured to modulate an input optical signal using an analog input electrical signal to generate an optical modulated signal. The coupler is configured to couple the optical modulated signal with the optical noise signal to generate at least one coupled signal. The photodetector is configured to generate a phase difference between the optical modulated signal and the optical noise signal using the at least one coupled signal. The limiter is configured to generate a decision signal based on the phase difference, and the DSP is configured to output a digital signal representative of the analog input electrical signal based on the decision signal.

Methods and systems 10 are provided for circuits. One method is for increasing device threshold voltage distribution of a plurality of devices of a circuit. The method includes adjusting a device threshold voltage of the plurality of devices by different amounts; and selecting a subset of the plurality of devices with adjusted device threshold voltage by a device selection module for performing a function associated with the circuit. In one aspect, a system for device threshold voltage adjustment is provided. The system includes a sensor module for sensing one or more of temperature and voltage values of a die having a plurality of devices for a circuit; and a threshold temperature and voltage compensation module for receiving an input value from the sensor module to compensate variation in a device threshold voltage caused by changes of one or more of temperature and voltage of the die.

A system includes analog-to-digital converter (ADC) logic, wherein the ADC logic includes a stage with a dynamic comparator circuit. The ADC logic also includes a residue stage. The dynamic comparator circuit includes a preamplifier and a common mode clamp circuit for the preamplifier.

A distributive photonic monobit analog-to-digital converter includes a plurality of signal processing chains configured to receive a corresponding plurality of analog input electrical signals. Each processing chain includes an incoherent optical source configured to generate an optical noise signal, an optical modulator configured to modulate an analog input electrical signal of the plurality of analog input electrical signals onto an input optical signal to generate an optical modulated signal, a coupler configured to couple the optical modulated signal with the optical noise signal to generate a coupled signal, a photodetector configured to generate a phase difference between the optical modulated signal and the optical noise signal using the coupled signal, and a limiter configured to output a decision signal based on the phase difference and using a clock signal. A multi-phase clock generator is configured to generate the clock signal for each of the plurality of signal processing chains.

A comparator circuit is applied to comparing an input voltage and a reference voltage to generate a comparison result. The comparator circuit includes a resistor circuit, a current source circuit and a transistor switching circuit. The resistor circuit receives first and second input voltages in the input voltage. The current source circuit provides a first current and a second current, and the first current, the second current and the resistor circuit generate the reference voltage. The transistor switching circuit generates the comparison result at its output end according to a first control voltage and a second control voltage at its input end. The current source circuit and the resistor circuit generate the first control voltage according to the first current and the first input voltage, and generate the second control voltage according to the second current and the second input voltage.