H03M3/344

Adaptive non-linearity identification and compensation using orthogonal functions in a mixed signal circuit
10594329 · 2020-03-17 · ·

A feedback divider in a mixed-signal circuit is modulated by a frequency control word controlling a delta-sigma modulator. An accumulated quantization error from the delta-sigma modulator is compared to a residual error in the circuit by a Least-Mean Square (LMS) correlator for gain calibration to adjust for linear errors. Upper bits of the accumulated quantization error access a lookup table to find two outputs of the compensation function that are interpolated between using lower bits of the accumulated quantization error. The interpolated result is an adjustment subtracted from the loop to compensate for non-linear errors. A set of orthogonal kernels is generated from the accumulated quantization error and calibrated using another LMS correlator and inverse transformed to generate updates to the non-linear compensation function in the lookup table. The kernels can be Walsh Hadamard (WH) and the inverse transformer an inverse WH transformer.

Square-law companding apparatus based on nonlinear operations on modulated bit-stream
10594335 · 2020-03-17 · ·

Disclosed are four independent circuits for compression, expansion, companding, and post-processing of a compressed delta-sigma bit-stream. Compression and expansion are based on the use of a second-order (or higher-order) delta-sigma modulator, and a nonlinear operation on a delta-sigma modulated bit-stream. Depending on application, the disclosed circuits can operate as a stand-alone integrated circuit, or as compandor apparatus as proposed. Inherited low-pass filter can be digital or analog. Thus, the only external analog component to the IC chip could be a capacitor C, when low-frequency analog signal is compressed or expanded.

Suppressing idle tones in a delta-sigma modulator

A delta-sigma modulator architecture with idle tone suppression based on injecting an out-of-band signal includes: modulator input circuitry to provide a modulator input signal; modulator loop circuitry to quantize the modulator input signal to generate a modulator output signal at an oversampling frequency, and to provide a feedback signal. Digital filtering circuitry filters the modulator output signal to provide a digital output signal at a data rate frequency related to the oversampling frequency by a defined oversampling ratio. Out-of-band (OoB) signal generator circuitry injects a deterministic OoB injection signal at a defined OoB frequency outside of a target frequency band. The modulator input circuitry combines the analog input signal, the feedback signal, and the OoB injection signal into the modulator input signal. The digital filtering circuitry filters the OoB injection signal. The OoB injection signal can be selectively defined to suppress idle tones generated in the modulator loop circuitry.

ANALOG-TO-DIGITAL CONVERTER CORRECTING FREQUENCY CHARACTERISTICS AND SEMICONDUCTOR DEVICE INCLUDING THE SAME

An analog-to-digital converter (ADC) includes a modulator configured to oversample an input signal generated from an output signal of a transducer; and a filter configured to perform a decimation operation on an output from the modulator and a frequency characteristics correction operation according to a filter control signal on the output from the modulator, wherein the frequency characteristics correction operation is performed to complement a frequency characteristics of the output signal of the transducer such that overall frequency characteristics of the transducer and the filter be flat in a signal band.

CALIBRATION OF ANTI-ALIASING FILTER MISMATCH

In accordance with embodiments of the present disclosure, a method may include, in a system comprising a differential filter comprising a plurality of impedance elements, applying a common-mode signal to the differential filter, measuring an output signal of the differential filter in response to the common-mode signal to determine an error due to impedance mismatch of the impedance elements, and tuning one or more of the plurality of impedance elements to minimize the error.

Excess Loop Delay Compensation for a Delta-Sigma Modulator

In accordance with an embodiment, a delta-sigma modulator includes: an analog loop filter comprising an outer portion and an inner portion having an input coupled to the outer portion; a quantizer coupled to an output of the inner portion of the analog loop filter; an outer feedback path coupled between an output of the quantizer and an input to the outer portion of the analog loop filter; and a compensation filter coupled between an output of the quantizer and an input of the inner portion of the analog loop filter. The compensation filter has a transfer function configured to correct for an effect of excess loop delay (ELD) on the delta-sigma modulator.

EXTENDED PULSE SAMPLING SYSTEM AND METHOD
20240053393 · 2024-02-15 · ·

A method for extended-pulse sampling includes providing a continuous-time signal comprising a frequency spectrum within a predetermined passband. The continuous time signal is sampled with a plurality of discrete sample pulses having a pulse shape in a time domain that is an impulse response of a filter having the predetermined passband. The plurality of discrete time samples of the continuous-time signal is then provided to an output.

DEVICE AND METHOD FOR TIME SKEW CALIBRATION OF MULTI CHANNEL ADC

An integrated circuit includes a plurality of ADC channels. During a calibration process of the ADC channels, the integrated circuit utilizes derivative filters to calculate a phase difference between the ADC channels. During a calibration process, the integrated circuit utilizes clock phase alignment circuits to align the phases of the ADC channels based on the outputs of the derivative filters.

ELECTRONIC CIRCUIT FOR IMPLEMENTING MODULATOR CONFIGURED TO PERFORM NOISE SHAPING IN DIGITAL DOMAIN

An electronic circuit includes an analog to digital converter (ADC) and a noise coupling filter. The ADC generates a digital output signal based on a first analog signal and a second analog signal. The noise coupling filter generates the second analog signal to be fed back for an input to the ADC, based on a first quantization error signal associated with converting the first analog signal to the digital output signal. The noise coupling filter performs noise shaping on a digital error signal derived from the quantization error signal and generates the second analog signal from a result of the noise shaping, using a clock in the digital domain.

Controlling noise transfer function of signal path to reduce charge pump noise
10491997 · 2019-11-26 · ·

An apparatus for generating an output signal, may comprise a signal path having an analog signal path portion having an analog magnitude droop, a digital signal path portion having a digital magnitude droop, a digital-to-analog converter for converting the digital input signal into the analog signal, a first digital compensation filter that compensates for the analog magnitude droop, and a second digital compensation filter that compensates for the digital magnitude droop, such that the first digital compensation filter and the second digital compensation filter together compensate for magnitude droop of the signal path to ensure a substantially flat passband response of the signal path. An apparatus may include a delta-sigma modulator for quantization noise shaping of a digital signal, a digital-to-analog converter configured to generate an analog signal from the digital signal, and an amplifier configured to amplify the analog signal and powered from a charge pump, wherein the charge pump is configured to operate at a switching frequency approximately equal to a zero of a modulator noise transfer function of the delta-sigma modulator, such that the impact of charge pump noise on a total harmonic distortion noise of the apparatus is minimized.