Various embodiments relate to delta-sigma loop filters with input feedforward. A delta-sigma loop filter may include a first integrator and a quantizer having an input coupled to an output of the first integrator. The delta-sigma loop filter may further include a first summing node having an output coupled to an input of the first integrator. Further, the delta-sigma loop filter may include a feedforward path from an input of the delta-sigma loop filter to a first input of the first summing node. The delta-sigma loop filter may also include a first feedback path from an output of the quantizer to a second input of the first summing node.

Various embodiments relate to an analog-to-digital converter (ADC). The ADC may include a first channel including a first delta-sigma loop filter and a second channel including a second delta-sigma loop filter. Each of the first delta-sigma loop filter and the second delta-sigma loop filter may include a first integrator and a quantizer having an input coupled to an output of the first integrator. Each of the first delta-sigma loop filter and the second delta-sigma loop filter may also include a first summing node having an output coupled to an input of the first integrator, and a feedforward path from an input of the delta sigma loop filter to a first input of the first summing node. Further, each of the first delta-sigma loop filter and the second delta-sigma loop filter may include a first feedback path from an output of the quantizer to a second input of the first summing node.

Provided is a delta-sigma AD converter including a delta-sigma modulating section that outputs a digital signal obtained by performing delta-sigma modulation with an oversampling ratio on an input analog signal; a digital filtering section that filters the digital signal with the oversampling ratio; a control terminal into which an external control signal is input; an output control section that performs control to output an output signal based on the filtered digital signal, according to the external control signal; and a setting section that sets the oversampling ratio based on interval information of the external control signal.

A method adapts a resonant frequency of a first filter of a closed control loop to a given frequency. The method includes feeding an output signal of a delta sigma modulator of the closed control loop into a frequency adaptation circuit and determining a first noise spectrum of the output signal in a first frequency band and a second noise spectrum of the output signal in a second frequency band. The first frequency band and the second frequency band are arranged symmetrically with respect to the given frequency. The method includes comparing the first noise spectrum with the second noise spectrum, generating an adaptation signal that causes a frequency adaptation of the resonant frequency if the first noise spectrum differs from the second noise spectrum, and outputting the adaptation signal from the frequency adaptation circuit to a control input of the first filter for adapting the resonant frequency.

A Sigma-Delta () modulator for converting an analog input signal having a frequency bandwidth around a variable center frequency f.sub.0 to a digital output signal at a sampling frequency f.sub.s. The modulator comprises a quantizer (420) for generating the digital output signal and a loop filter for shaping the quantization noise. The loop filter comprises at least one subfilter (430, 410) centered around a frequency f.sub.0 and constant noise shaping coefficients (451, 452, 453). The modulator further comprises a tunable delay element (455), a frequency adjuster (480) for adjusting the sampling frequency f.sub.s such that the normalized center frequency f.sub.0/f.sub.s is constant, and a delay adjuster (490) for adjusting the loop delay t.sub.d implemented by the quantizer and the tunable delay element (455), such that the normalized loop delay t.sub.d/T.sub.s falls in a predetermined range [t.sub.min, t.sub.max], where T.sub.s=1/f.sub.s.

A high-speed digital transmitter for wireless communication systems includes a plurality of transmitter chain circuits configured to respectively receive incoming component signals having a first frequency and to produce outgoing transmission signals having a second frequency greater than the first frequency in a first domain. In some aspects, the incoming component signals are up-sampled to the second frequency using a plurality of streams processed concurrently at a predetermined sample rate over a predetermined number of interpolation filter stages in each of the plurality of transmitter chain circuits. The high-speed digital transmitter also includes a serializer configured to combine the outgoing transmission signals from the plurality of transmitter chain circuits into a serialized transmission signal having a third frequency greater than the second frequency in a second domain different from the first domain.

Provided is a delta-sigma AD converter including a delta-sigma modulating section that outputs a digital signal obtained by performing delta-sigma modulation with an oversampling ratio on an input analog signal; a digital filtering section that filters the digital signal with the oversampling ratio; a control terminal into which an external control signal is input; an output control section that performs control to output an output signal based on the filtered digital signal, according to the external control signal; and a setting section that sets the oversampling ratio based on interval information of the external control signal.

A signal processing circuit is provided. The signal processing circuit includes an analog-front-end circuit and a filter circuit. The analog-front-end circuit is configured to receive a sensing signal from a touch panel and perform a signal capture operation on the sensing signal to output a current signal. The filter circuit is coupled to the analog-front-end circuit. The filter circuit is configured to receive the current signal from the analog-front-end circuit and perform a signal filter operation on the current signal to output a first voltage signal. The filter circuit includes an anti-aliasing filter and a comb filter coupled in series.

Various embodiments relate to delta-sigma loop filters with input feedforward. A delta-sigma loop filter may include a first integrator and a quantizer having an input coupled to an output of the first integrator. The delta-sigma loop filter may further include a first summing node having an output coupled to an input of the first integrator. Further, the delta-sigma loop filter may include a feedforward path from an input of the delta-sigma loop filter to a first input of the first summing node. The delta-sigma loop filter may also include a first feedback path from an output of the quantizer to a second input of the first summing node.

Various embodiments relate to an analog-to-digital converter (ADC). The ADC may include a first channel including a first delta-sigma loop filter and a second channel including a second delta-sigma loop filter. Each of the first delta-sigma loop filter and the second delta-sigma loop filter may include a first integrator and a quantizer having an input coupled to an output of the first integrator. Each of the first delta-sigma loop filter and the second delta-sigma loop filter may also include a first summing node having an output coupled to an input of the first integrator, and a feedforward path from an input of the delta-signal loop filter to a first input of the first summing node. Further, each of the first delta-sigma loop filter and the second delta-sigma loop filter may include a first feedback path from an output of the quantizer to a second input of the first summing node.