A zero padding apparatus and method for fixed length signaling information are disclosed. A zero padding apparatus according to an embodiment of the present invention includes a processor configured to generate a LDPC information bit string by deciding a number of groups whose all bits are to be filled with 0 using a difference between a length of the LDPC information bit string and a length of a BCH-encoded bit string, selecting the groups using a shortening pattern order to fill all the bits of the groups with 0, and filling at least a part of remaining groups, which are not filled with 0, with the BCH-encoded bit string; and memory configured to provide the LDPC information bit string to an LDPC encoder.

An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal; a power normalizer configured to reduce power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing time-interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling start position information and size information for each of Physical Layer Pipes (PLPs). In this case, the Physical Layer Pipes include a core layer physical layer pipe corresponding to the core layer signal and an enhanced layer physical layer pipe corresponding to the enhanced layer signal.

A power generation device includes a band gap reference (BGR) circuit configured to generate a reference voltage independent of an environmental change, and a voltage generation circuit configured to transfer an input power voltage based on a sum of the reference voltage and an internal ground voltage to generate an internal power voltage.

A memory system includes a non-volatile memory and a controller. The controller is configured to perform iterative correction on a plurality of frames of data read from the non-volatile memory. The iterative correction includes performing a first error correction on each of the frames including a first frame having errors not correctable by the first error correction, generating a syndrome on a set of second frames that include the first frame, performing a second error correction on the second frames using the syndrome, and performing a third error correction on the first frame. Each of the frames includes user data and first parity data used in the first error correction, the first parity data of the first frame also being used in the third error correction.

A data storage device is disclosed comprising a non-volatile storage medium (NVSM). Problematic patterns in a block of input data are identified, and the problematic patterns are relocated from an initial location to an erasure region of the block to generate a modified block. The modified block is erasure encoded into an erasure codeword, at least part of the erasure codeword is stored in the NVSM.

An apparatus for data storage includes an interface and a processor. The interface is configured to communicate with a memory device that includes (i) a plurality of memory cells and (ii) a data compression module. The processor is configured to determine a maximal number of errors that are required to be corrected by applying a soft decoding scheme to data retrieved from the memory cells, and based on the maximal number of errors, to determine an interval between multiple read thresholds for reading Code Words (CWs) stored in the memory cells for processing by the soft decoding scheme, so as to meet following conditions: (i) the soft decoding scheme achieves a specified decoding capability requirement, and (ii) a compression rate of the compression module when applied to confidence levels corresponding to readouts of the CWs, achieves a specified readout throughput requirement.

A digital radio OFDM modulator and demodulator provide an efficient mode and a backwards-compatible mode to work with IEEE 802.15.4g or a similar standard. In backwards-compatible mode, they use a single method for error encoding physical header and payload transmit data, and a single method for detecting and correcting errors in physical header and payload receive data. In efficient mode, they use two different methods. The payload is BCH-LDPC encoded. They may also use mapping constellations that are not available in IEEE 802.15.4g, including 64-QAM, 256-QAM, and APSK. To ensure that physical header data can be received more robustly than payload data, they use frequency diversity of the physical header data, and selection maximal ratio combining (SMRC) in the demodulator to reduce the bit error rate (BER) at a low cost.

The present technology relates to a data processing device and a data processing method, which are capable of securing excellent communication quality in data transmission using an LDPC code. In group-wise interleave, an LDPC code in which a code length N is 16200 bits and an encoding rate r is 10/15 or 12/15 is interleaved in units of bit groups of 360 bits. In group-wise deinterleave, a sequence of the LDPC code that has undergone the group-wise interleave is restored to an original sequence. For example, the present technology can be applied to a technique of performing data transmission using an LDPC code.

This disclosure provides methods, devices and systems for acknowledgement and retransmission, and more specifically, to methods, devices and systems that enable a secondary wireless channel to provide acknowledgements of data transmitted on a primary wireless channel concurrently with the reception of additional data on the primary wireless channel. In some implementations, a transmitting device may transmit wireless packets including multiple codewords to a receiving device via a first wireless channel. The receiving device may attempt to decode the received codewords based on primary information in the codewords. The receiving device may then transmit to the transmitting device, via a second wireless channel, a codeword acknowledgement that identifies codewords that the receiving device did not successfully decode. The transmitting device may then transmit parity information to the receiving device via the first wireless channel that aids the receiving device in decoding the identified codewords.

A method for managing processing power in a storage system is provided. The method includes providing a plurality of blades, each of a first subset having a storage node and storage memory, and each of a second, differing subset having a compute-only node. The method includes distributing authorities across the plurality of blades, to a plurality of nodes including at least one compute-only node, wherein each authority has ownership of a range of user data.