The present disclosure relates to data processing methods and apparatus. One example method includes obtaining a first data block from first optical path data, adding padding data and the first data block into a target information bit in a first data frame to form target data, encoding the target data to obtain a first code block, and sending the first code block.

A technique provides efficient data protection, such as erasure coding, for data blocks of volumes served by storage nodes of a cluster. Data blocks associated with write requests of unpredictable client workload patterns may be compressed. A set of the compressed data blocks may be selected to form a write group and an erasure code may be applied to the group to algorithmically generate one or more encoded blocks in addition to the data blocks. Due to the unpredictability of the data workload patterns, the compressed data blocks may have varying sizes. A pool of the various-sized compressed data blocks may be established and maintained from which the data blocks of the write group are selected. Establishment and maintenance of the pool enables selection of compressed data blocks that are substantially close to the same size and, thus, that require minimal padding.

A method includes, storing a set of valid codewords including: a first valid functional codeword representing a functional state of a controller subsystem; a first valid fault codeword representing a fault state of the controller subsystem and characterized by a minimum hamming distance from the first valid functional codeword; a second valid functional codeword representing a functional state of a controller; and a second valid fault codeword representing a fault state of the controller; in response to detecting functional operation of the controller subsystem, storing the first valid functional codeword in a first memory; in response to detecting a match between contents of the first memory and the first valid functional codeword, outputting the second valid functional codeword; in response to detecting a mismatch between contents of the first memory and every codeword in the first set of valid codewords, outputting the second valid fault codeword.

A semiconductor system includes a controller configured to, in a write operation, output write data and a write error code through at least any one of input/output lines, and in a read operation, receive read data and a read error code through at least any one of the input/output lines and detect a failure of the input/output lines depending on whether the read data is error-corrected; and a semiconductor device configured to, in the write operation, correct an error of the write data based on the write error code, store the error-corrected write data and store the write error code, and in the read operation, correct an error of the write data based on the write error code stored in the write operation, output the error-corrected write data as the read data, and output the write error code stored in the write operation, as the read error code.

A method begins by a load balancing module of a distributed storage network (DSN) determining availability of a plurality of DSN processing units of a set of DSN processing units based on availability information associated with the plurality of DSN processing units and in response to determined availability, selecting a DSN processing unit form the set to process a data access request. The method continues with the load balancing module receiving an indication that the DSN processing unit is no longer available from the DSN processing unit while the DSN processing unit continues to process previously pending data access requests. The method continues with the load balancing module cancelling selection of the DSN processing unit to process the data access request; and receiving a second indication from the DSN processing unit indication that the DSN processing unit is available.

The disclosure relates to a communication method and system for converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of Things (IoT). The disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. The disclosure relates to encoding and decoding by using a polar code in a wireless communication system, and an operation method of a transmission-end apparatus includes determining segmentation and the number of segments, based on parameters associated with encoding of information bits, encoding the information bits according to the number of check bits, and transmitting the encoded information bits to a reception-end apparatus.

The disclosure relates to a communication method and system for converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of Things (IoT). The disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. The disclosure relates to encoding and decoding by using a polar code in a wireless communication system, and an operation method of a transmission-end apparatus includes determining segmentation and the number of segments, based on parameters associated with encoding of information bits, encoding the information bits according to the number of check bits, and transmitting the encoded information bits to a reception-end apparatus.

A mobile electronic device may include a memory device and a memory controller including an error correction code (ECC) encoder to encode data, a constrained channel encoder configured to encode an output of the ECC encoder based on one or more constraints, a reinforcement learning pulse programming (RLPP) component configured to identify a programming algorithm for programming the data to the memory device, an expectation maximization (EM) signal processing component configured to receive a noisy multi-wordline voltage vector from the memory device and classify each bit of the vector with a log likelihood ration (LLR) value, a constrained channel decoder configured to receive a constrained vector from the EM signal processing component and produce an unconstrained vector, and an ECC decoder configured to decode the unconstrained vector. A machine learning interference cancellation component may operate based on or independent of input from the EM signal processing component.

A semiconductor device includes a syndrome generation circuit configured to generate a syndrome code based on data and an error correction code corresponding to the data, an error determination circuit configured to detect a 1-bit error in the data based on the syndrome code, and multi-bit error detection circuit configured to determine whether the data detected to have 1-bit error includes a multi-bit error by using an error address of the data detected to have 1-bit error and an error syndrome code of the data detected to have 1-bit error.

Disclosed are an encoder, a transmission device, and an encoding method with which the transmission amount is reduced and a deterioration in transmission efficiency is suppressed while improving reception quality when QC-LDPC or a like block encoding is used. A puncture pattern setting unit (620) searches for a puncture pattern for each integral multiple of the number of columns or for each divisor of the number of columns of a sub block matrix that forms a check matrix (H) of a QC-LDPC code, and a puncture unit (data reduction unit) (630) switches the puncture pattern for each integral multiple of the number of columns or for each divisor of the number of columns of the sub block matrix that forms the check matrix of the QC-LDPC code.