A loss correction encoding device having an improved capability of loss correction using LDPC-CC includes a rearranging unit that rearranges information data contained in n information packets according to the constraint length Kmax and the encoding rate (q−1)/q of a check polynomial of the loss correction code used in a loss correction encoding unit. Specifically, the rearranging unit rearranges the information data in such a way that continuous Kmax×(q−1) pieces of information data after rearrangement are contained in different information packets. The rearranging unit distributes the information data to information blocks from n information packets, where n satisfies the formula Kmax×(q−1)≤n.

Disclosed embodiments of the present disclosure relate, generally, to systems, methods, and devices for correction of burst-errors induced during transmission of encoded blocks of information. Some embodiments relate to decoders configured to test candidate corrections on a received block of information and select a candidate correction that best fits the characteristics of burst-errors expected for a type of transmission scheme. Such tested candidate corrections may be selected based on characteristics of burst-errors typically induced for a type of transmission scheme. Some embodiments relate to decoders configured to test candidate corrections for correcting burst-errors and perform standard error correcting techniques such as Reed-Solomon forward error correction techniques. Some embodiments relate to systems, such as serial/deserializer interfaces, that incorporate such decoders.

Disclosed embodiments of the present disclosure relate, generally, to systems, methods, and devices for correction of burst-errors induced during transmission of encoded blocks of information. Some embodiments relate to decoders configured to test candidate corrections on a received block of information and select a candidate correction that best fits the characteristics of burst-errors expected for a type of transmission scheme. Such tested candidate corrections may be selected based on characteristics of burst-errors typically induced for a type of transmission scheme. Some embodiments relate to decoders configured to test candidate corrections for correcting burst-errors and perform standard error correcting techniques such as Reed-Solomon forward error correction techniques. Some embodiments relate to systems, such as serial/deserializer interfaces, that incorporate such decoders.

Apparatus and methods for implementing high-speed Ethernet links using a hybrid PHY (Physical layer) selectively configurable to employ a non-interleaved RS-FEC (Reed Solomon Forward Error Correction) sublayer or an interleaved RS-FEC sublayer. An adaptive link training protocol is used during link training to determine whether to employ the non-interleaved or interleaved RS-FEC during link DATA mode. Training frames are exchanged between link partners including control and status fields used to respectfully request a non-interleaved or interleaved FEC mode and confirm the requested FEC mode is to be used during link DATA mode. The hybrid PHY includes interleaved RS-FEC and non-interleaved RS-FEC sublayers for transmitter and receiver operations. During link training, a determination is made to whether a local receiver is likely to see decision feedback equalizer (DFE) burst errors. If so, the interleaved FEC mode is selected; otherwise the non-interleaved FEC mode is selected or is the default FEC mode. The apparatus and methods may be implemented for 100 GB ASE-CR1 and 100 GB ASE-KR1 Ethernet links and interfaces.

Apparatus and methods for implementing high-speed Ethernet links using a hybrid PHY (Physical layer) selectively configurable to employ a non-interleaved RS-FEC (Reed Solomon Forward Error Correction) sublayer or an interleaved RS-FEC sublayer. An adaptive link training protocol is used during link training to determine whether to employ the non-interleaved or interleaved RS-FEC during link DATA mode. Training frames are exchanged between link partners including control and status fields used to respectfully request a non-interleaved or interleaved FEC mode and confirm the requested FEC mode is to be used during link DATA mode. The hybrid PHY includes interleaved RS-FEC and non-interleaved RS-FEC sublayers for transmitter and receiver operations. During link training, a determination is made to whether a local receiver is likely to see decision feedback equalizer (DFE) burst errors. If so, the interleaved FEC mode is selected; otherwise the non-interleaved FEC mode is selected or is the default FEC mode. The apparatus and methods may be implemented for 100 GB ASE-CR1 and 100 GB ASE-KR1 Ethernet links and interfaces.

Systems and methods are provided for implementing forward error correction (FEC) on data transferred on a data link on the physical layer. Binary encoding can be done in accordance with a physical unit (phit) FEC format. The phit FEC format allows for correction of two bit errors and comprises a codeword having a variable bit size. Pre-coding the phit enables burst errors associated with the link to converted into bit errors. The data can be transmitted in the phit FEC format to a receiving PHY. The correctable two bit errors at one or more locations within the phit FEC format can then be corrected by decoding at the receiving PHY in accordance with the phit FEC. The FEC techniques can minimize latency in the PHY.

An error correction circuit includes ECC encoder and an ECC decoder. The ECC encoder generates, based on a first main data obtained by selectively shifting data bits of a main data based on a LSB of a row address, a parity data using an ECC and stores a codeword including the main data and the parity data in a target page. The ECC decoder generates a syndrome based on a second main data obtained by selectively shifting data bits of the main data based on the LSB of the row address, the parity data and a parity check matrix based on the ECC, and corrects a single bit error or corrects two bit errors when the two bit errors occur in adjacent two memory cells based on the syndrome. The mis-corrected bit is generated when the multiple error bits are present in the main data.

A loss correction encoding device having an improved capability of loss correction using LDPC-CC includes a rearranging unit that rearranges information data contained in n information packets according to the constraint length Kmax and the encoding rate (q−1)/q of a check polynomial of the loss correction code used in a loss correction encoding unit. Specifically, the rearranging unit rearranges the information data in such a way that continuous Kmax×(q−1) pieces of information data after rearrangement are contained in different information packets. The rearranging unit distributes the information data to information blocks from n information packets, where n satisfies the formula Kmax×(q−1)≤n.

A loss correction encoding device having an improved capability of loss correction using LDPC-CC includes a rearranging unit that rearranges information data contained in n information packets according to the constraint length Kmax and the encoding rate (q−1)/q of a check polynomial of the loss correction code used in a loss correction encoding unit. Specifically, the rearranging unit rearranges the information data in such a way that continuous Kmax×(q−1) pieces of information data after rearrangement are contained in different information packets. The rearranging unit distributes the information data to information blocks from n information packets, where n satisfies the formula Kmax×(q−1)≤n.

A loss correction encoding device having an improved capability of loss correction using LDPC-CC includes a rearranging unit that rearranges information data contained in n information packets according to the constraint length Kmax and the encoding rate (q−1)/q of a check polynomial of the loss correction code used in a loss correction encoding unit. Specifically, the rearranging unit rearranges the information data in such a way that continuous Kmax×(q−1) pieces of information data after rearrangement are contained in different information packets. The rearranging unit distributes the information data to information blocks from n information packets, where n satisfies the formula Kmax×(q−1)≤n.