Patent classifications
H03M13/2912
FLASH MEMORY SYSTEM AND OPERATING METHOD THEREOF
An operation method of a flash memory system includes: obtaining first syndrome values to a codeword; obtaining locations of errors and the number of the locations of errors based on the first syndrome values; error-correcting the codeword by flipping bit values of error bits of the codeword based on the locations of errors to generate an error-corrected codeword; obtaining second syndrome values to the error-corrected codeword; determining whether an error is found in the error-corrected codeword based on the second syndrome values; changing the first syndrome values when it is determined that no error is found in the error-corrected codeword; and restoring the error-corrected codeword to the codeword by re-flipping the flipped bit values when it is determined that an error is found in the error-corrected codeword.
FORWARD ERROR CORRECTION WITH FLEXIBLE MATRIX FOR DYNAMIC INPUT DATA RATE
Described herein are systems, methods, and other techniques for performing forward error correction in a communication system. A set of data blocks to be transmitted over a wireless channel are received. Rows of a flexible matrix are formed using the set of data blocks based on arrival times of the set of data blocks, each of the rows corresponding to a different time window. A set of random parity blocks are computed by performing row-wise parity operations on the flexible matrix. A set of burst parity blocks are computed by performing column-wise parity operations on the flexible matrix in accordance with a burst parity computation scheme. The set of data blocks, the set of random parity blocks, and the set of burst parity blocks are transmitted over the wireless channel to a receiver.