A method of transmitting a signal using carrier aggregation, the method comprising providing at least two component carriers, combining the at least two component carriers in the digital domain, converting the combined component carriers to the analog domain with a DAC, passing the combined component carriers through an up conversion mixer to convert each combined component carrier to within a predetermined bandwidth centred on a conversion intermediate frequency to provide a signal for transmission comprising the combined component carriers, transmitting the signal.

The present disclosure relates to a wireless communication node comprising at least one array antenna configured to receive a radio signal, said array antenna comprising a plurality of receiving antenna devices, each of said antenna devices being connected to a respective receiving circuit which is configured for processing said radio signal. Each receiving circuit comprises a demodulator, an analog-to-digital converter and a decoder, the demodulator being configured to receive an analog signal from the corresponding receiving antenna device and to output a demodulated analog signal to said analog-to-digital converter which outputs a converted digital signal to the decoder. Furthermore, the node is configured for adding a direct current, DC, offset value to said demodulated analog signal wherein the combined offset values of said node follow a predetermined distribution of values, having a variance, over the analog-to-digital converters.

An ultra-low power back-channel receiver is presented that demodulates binary a FSK back-channel signal embedded in 5.8 GHz IEEE 802.11a Wi-Fi OFDM packets. The architecture of the back-channel receiver employs a two-step down-conversion where the first mixing stage downconverts using the third harmonic of the local oscillator for power efficiency. The LP-65 nm CMOS receiver consumes 335 W with a sensitivity of 72 dBm at a BER of 10.sup.3 and data-rate of 31.25 kb/s. The radio uses a balun and a 250 kHz reference crystal as external components. The receiver uses a 1V supply voltage for analog blocks, and 0.85V for digital blocks including the local oscillator and the frequency-locked loop circuits.

After transmitting first electrical signals to a receiver, a transmitter receives a burst absent mode signal from the receiver. While in a ready state, the transmitter receives a signal including a data burst, converts the signal to second electrical signals, including a settled DC offset, and transmits the second electrical signals to the receiver. The receiver transmits the burst absent mode signal to the transmitter after receiving the first electrical signals, detects a presence of the second electrical signals. In response to detecting the presence of the second electrical signals, the receiver removes the DC offset from the second electrical signals to generate output signals, and causes transmitting the output signals to a subsequent device. The receiver removes the DC offset by causing an instruction to discharge AC coupling capacitors. The burst absent mode signal is generated using a host reset instruction or an internally generated instruction.

A transceiver that allows dynamic high-pass filter (HPF) cut-off frequency adjustment may include a mixer circuit to mix a local oscillator (LO) signal with a receive (RX) signal received from a transmitter to generate a baseband signal. The transceiver may further include a high-pass filter (HPF) having an adjustable cut-off frequency that is used to reduce a DC offset of the baseband signal. A control circuit can dynamically control components of the HPF to set the adjustable cut-off frequency at a first frequency during a first time period and at a second frequency during a second time period.

A first wireless communication apparatus includes a transceiver including a direct current (DC) component filter configured to remove a DC component of a first data signal received from a second wireless communication apparatus via a channel and output a corresponding second data signal, and a measurement circuit configured to determine a target subcarrier set based on a carrier frequency offset with respect to the second data signal, and measure noise and a signal-to-noise ratio (SNR) of the second data signal using the target subcarrier set.

A quadrature detection unit subjects an FM signal to quadrature detection using a local oscillation signal and outputs a base band signal. A first correction unit and a second correction unit correct the base band signal using a DC offset correction value. A DC offset detection unit subjects the corrected base band signal to rectangular to polar conversion and derives the DC offset correction value such that amplitudes in a plurality of phase domains defined in an IQ plane approximate each other. An FM detection unit subjects the corrected base band signal to FM detection and generates a detection signal. An addition unit adds an offset to the detection signal. An AFC unit generates a control signal for controlling a frequency of a local oscillation signal based on the detection signal to which the offset is added.

A transceiver that allows dynamic high-pass filter (HPF) cut-off frequency adjustment may include a mixer circuit to mix a local oscillator (LO) signal with a receive (RX) signal received from a transmitter to generate a baseband signal. The transceiver may further include a high-pass filter (HPF) having an adjustable cut-off frequency that is used to reduce a DC offset of the baseband signal. A control circuit can dynamically control components of the HPF to set the adjustable cut-off frequency at a first frequency during a first time period and at a second frequency during a second time period.

A radio system comprises a radio transmitter apparatus and a radio receiver apparatus. The radio transmitter apparatus is configured to transmit a continuous-wave radio-frequency signal having a first frequency. The radio receiver apparatus comprises: an antenna for receiving the continuous-wave radio-frequency signal; a local oscillator for generating a periodic signal at a second frequency which differs from the first frequency by a frequency offset; a mixer for mixing the received continuous-wave radio-frequency signal with the periodic signal to generate a down-mixed signal; and a processor or other circuitry configured to generate frequency-offset data from the down-mixed signal, wherein the frequency-offset data is representative of an estimate of the frequency offset. The processor or other circuitry is configured to use the frequency-offset data to generate DC-offset data representative of an estimate of a DC offset component of the down-mixed signal.

A test apparatus includes a device under test (DUT) configured to exchange data using a serial interface protocol and a test controller configured to receive a binary vector corresponding to a physical layer of the serial interface protocol from an external device and to buffer and transmit the received binary vector to the DUT.