Patent classifications
H04L1/0053
FEC Decoding Apparatus and Method
A decoding apparatus and method. When all the code words in the to-be-decoded group meet that a checksum is 0, forward error correction (FEC) decoding is not performed, and only the sign bit decision is performed. That is, in a process of performing multiple times of decoding on each code word, FEC decoding is not always performed every time. This reduces power consumption required by FEC decoding.
Method, apparatus and system for feeding back early stop decoding
A method, apparatus and system for feeding back early stop decoding are provided. The method includes: a terminal side adjusting encoded TFCI bits, and sending the adjusted TFCI bits to a NodeB side via a TFCI domain of an uplink DPCCH (S302); after sending the adjusted TFCI bits to the NodeB side, the terminal side performing a decoding operation on a downlink DPCH, and feeding back, via an idle TFCI domain of the uplink DPCCH, a decoding result to the NodeB side (304). By applying the technical solution, at least one of the problems in the related art that a NodeB cannot obtain a TFCI in time and a terminal side cannot feed back a downlink decoding result in time during early stop decoding can be solved.
APPARATUS AND METHOD FOR RECEIVING SIGNAL IN COMMUNICATION SYSTEM SUPPORTING LOW DENSITY PARITY CHECK CODE
The present disclosure relates to a pre-5th-generation (5G) or 5G communication system to be provided for supporting higher data rates beyond 4th-generation (4G) communication system such as a long term evolution (LTE). A method of a receiving apparatus in a communication system supporting a low density parity check (LDPC) code is provided. The method includes deactivating variable nodes of which absolute values of log likelihood ratio (LLR) values are greater than or equal to a first threshold value; changing LLR values of variable nodes of which absolute values of LLR values are less than a second threshold value among variable nodes other than the deactivated variable nodes to a preset value, and detecting LLR values of check nodes based on LLR values of the variable nodes other than the deactivated variable nodes.
METHOD AND APPARATUS FOR DETECTING DOWNLINK CONTROL SIGNALING, AND SYSTEM
Disclosed are a downlink control signaling detection method and apparatus, and a system, belonging to the technical field of communications. Said method comprises: sending a first indication signal to an access network device; determining a target demodulation method for demodulating target downlink control signaling; acquiring target detection parameters corresponding to the target demodulation method; and detecting the target downlink control signaling according to the target detection parameters. The present disclosure acquires, by determining a target demodulation method for demodulating target downlink control signaling, target detection parameters corresponding to the target demodulation method, and detects the target downlink control signaling according to the target detection parameters.
RECEIVING APPARATUS AND DECODING METHOD
A decoding method includes: receiving a plurality of subcarrier signals each including encoded data; acquiring a predetermined amount of data from each of the plurality of subcarrier signals; correcting errors in the plurality of subcarrier signals by performing decoding arithmetic processing on the respective predetermined amounts of data acquired from the plurality of subcarrier signals in a time-division manner; and causing the decoding arithmetic processing to be consecutively performed on each of the predetermined amounts of data a predetermined number of times.
High rate receiver circuit
The application relates to methods and devices for use in a receiver circuit (200) configured to receive data in transport blocks where each transport block comprises a set of individually decodable code blocks is provided. The receiver circuit comprises a decoder (102) for decoding the received data and at least one on-chip FIFO memory (210). The receiver circuit also comprises a Layer 2 decipher unit (104), and a buffer memory (106). In the receiver circuit, a controller (220) is provided. The decoder is configured to store a correctly decoded code block in the at least one on-chip FIFO memory, and when a code block of a transport block is incorrectly decoded, store any subsequent correctly decoded code block of the same transport block in the buffer memory. Hereby an efficient receiver circuit that can be implemented using a small on-chip memory is provided.
COMMUNICATION DEVICES AND METHODS BASED ON MARKOV-CHAIN MONTE-CARLO (MCMC) SAMPLING
Bayesian Inference based communication receiver employs Markov-Chain Monte-Carlo (MCMC) sampling for performing several of the main receiver functionalities. The channel estimator estimates the multipath channel coefficients corresponding to a signal received with fading. The symbol demodulator demodulates the received signal according to a QAM constellation, so as to generate a demodulated signal, and estimate the transmitted symbols. The decoder reliably decodes the demodulated signals to generate an output bit sequence, factoring in redundancy induced at a certain code rate. A universal sampler may be configured to use MCMC sampling for generating estimates of channel coefficients, transmitted symbols or decoder bits, for aforementioned functionalities, respectively. The samples may then be used in one or more of the receiver tasks: channel estimation, signal demodulation, and decoding, which leads to a more scalable, reusable, power/area efficient receiver.
Address filtering in a radio frequency front end of a receiver
A radio frequency (RF) front end receives one or more symbols of a first frame transmitted by a transmitter. The RF front end determines that the one or more received symbols are correlated to one or more address symbols, where the one or more address symbols are each a time-domain signal of subcarriers that the transmitter transmits. The RF front end provides the received one or more symbols to a baseband system based on the correlation. The baseband system recovers bits of a second frame within the first frame based on the received one or more symbols.
Base station apparatus, terminal apparatus, and communication method
The present invention provides a base station apparatus, a terminal apparatus, and a communication method, which are capable of throughput improvement. A base station apparatus that communicates with a terminal apparatus, includes a higher layer processing unit that configures a CSI process that is a configuration relating to reporting of a channel state information (CSI), for the terminal apparatus for which a prescribed transmission mode is configured, in which the CSI process includes a configuration of a CSI reference signal and a configuration relating to two different code books. A terminal apparatus that communicates with a base station apparatus, includes a higher layer processing unit for which a CSI process that is a configuration relating to reporting of channel state information (CSI) is configured by the base station apparatus, and a transmission unit that transmits the CSI based on the CSI process, in which the CSI information includes a configuration of a CSI reference signal and a configuration relating to two different code books.
Systems and methods for Nyquist error correction
The present invention is directed to communication systems and methods. In a specific embodiment, the present invention provides a receiver that includes an error correction module. A syndrome value, calculated based on received signals, may be used to enable the error correction module. The error correction module includes an error generator, a Nyquist error estimator, and a decoder. The decoder uses error estimation generated by the Nyquist error estimator to correct the decoded data. There are other embodiments as well.