A method for processing, in a receiver device, a signal representative of a stream of data coded from a series of information units through coding using a predefined group of symbols to code each information unit of the series, comprises: —a step of receiving (E0) said signal, said signal having been sent by a sender device via a transmission channel, said received signal containing a sequence of symbols of predefined length, and —a step of combined equalization and decoding (E3) applied to said received signal (Ireceived), using a mesh (100) representing the transmission channel (3) and the coding that is used, the mesh (100) containing a number of nodes (101) representing states of the transmission channel (104), said states of the transmission channel (104) taking into account said coding that is used.

Techniques are presented for mapping a digital data sequence into a signal point sequence for transmission. The signal point sequence belongs to a set of possible signal point sequences. In one example, a digital data sequence is received. Forbidden branch flags that forbid certain signal points in the possible signal points sequences are applied. The signal point sequence is selected from a subset of all the possible signal point sequences based on the digital data sequence. The subset is defined by the forbidden branch flags.

A turbo decoder circuit performs a turbo decoding process to recover a frame of data symbols from a received signal comprising soft decision values for each data symbol of the frame. The data symbols of the frame have been encoded with a turbo encoder comprising upper and lower convolutional encoders which can each be represented by a trellis, and an interleaver which interleaves the encoded data between the upper and lower convolutional encoders. The turbo decoder circuit comprises a clock, a configurable network circuitry for interleaving soft decision values, an upper decoder and a lower decoder. Each of the upper and lower decoders include processing elements, which are configured, during a series of consecutive clock cycles, iteratively to receive, from the configurable network circuitry, a priori soft decision values pertaining to data symbols associated with a window of an integer number of consecutive trellis stages representing possible paths between states of the upper or lower convolutional encoder. The processing elements perform parallel calculations associated with the window using the a priori soft decision values in order to generate corresponding extrinsic soft decision values pertaining to the data symbols. The configurable network circuitry includes network controller circuitry which controls a configuration of the configurable network circuitry iteratively, during the consecutive clock cycles, to provide the a priori soft decision values for the upper decoder by interleaving the extrinsic soft decision values provided by the lower decoder, and to provide the a priori soft decision values for the lower decoder by interleaving the extrinsic soft decision values provided by the upper decoder. The interleaving performed by the configurable network circuitry controlled by the network controller is in accordance with a predetermined schedule, which provides the a priori soft decision values at different cycles of the one or more consecutive clock cycles to avoid contention between different a priori soft decision values being provided to the same processing element of the upper or the lower decoder during the same clock cycle. Accordingly the processing elements can have a window size which includes a number of stages of the trellis so that the decoder can be configured with an arbitrary number of processing elements, making the decoder circuit an arbitrarily parallel turbo decoder.

A transmitting system, receiving system, and a method of processing broadcast signals are disclosed. The method for processing a broadcast signal in a broadcast receiver comprises receiving a DTV signal including a data group, the data group including mobile service data, segmented known data sequences, long known data sequences and transmission parameter data, compensating carrier frequency offset of the DTV signal and channel-equalizing the carrier frequency offset compensated DTV signal using at least one of the long known data sequences and segmented known data sequences in the data group of the DTV signal, wherein the channel-equalizing includes performing a Error Correction (FEC) decoding on data located between the segmented known data sequences, and estimating Channel Impulse Response (CIR) using the FEC decoded data as known data.

A method for generating a Trellis-Coded Modulation (TCM) scheme for transmitting symbols over a Partial-Response (PR) channel, the method including holding a base TCM scheme including a plurality of states and transitions among the states. Sequences of symbols are produced, and second sequences of symbols are calculated, each second sequence emulating a response of the PR channel to a respective sequence of symbols traversing the PR channel. The TCM scheme is initialized by assigning the sequences to the transitions of the base TCM scheme. One or more transitions are removed so that second sequences corresponding to transitions that were not removed are separated by at least a first distance. One or more additional transitions are further removed from the TCM scheme, so that second sequences corresponding to parallel transitions from a current state to a next state are separated by at least a second distance larger than the first distance.

This disclosure describes systems, methods, and devices related to enhanced constellation shaping. A device may generate payload bits associated with a frame to be sent to a first station device. The device may generate a first output bits having a first length based on the application of a first mask of one or more masks to the payload bits. The device may generate a second output bits having a second length based on the application of a second mask of the one or more masks. The device may compare the first length of the first output bits to the second length of the second output bits. The device may select the first mask or the second mask based on the comparison. The device may convert the payload bits using the selected mask before passing through a shaping encoder to generate shaped bits. The device may cause to send the frame bits and an indication of the selected mask to the first station device.

Techniques are presented for mapping a digital data sequence into a signal point sequence for transmission. The signal point sequence belongs to a set of possible signal point sequences. In one example, a digital data sequence is received. Forbidden branch flags that forbid certain signal points in the possible signal points sequences are applied. The signal point sequence is selected from a subset of all the possible signal point sequences based on the digital data sequence. The subset is defined by the forbidden branch flags.

An example device includes processing circuitry configured to determine a first state of a data structure, the first state representing a first quantizer applied to a previously quantized or inverse quantized value of a previous transform coefficient of residual data for a block of the video data and update the data structure to a second state according to the first state and a parity of a partial set of syntax elements representing a partial set of a plurality of coefficient levels for the previous transform coefficient. The processing circuitry is further configured to determine a second quantizer to be used to quantize or inverse quantize a current value of a current transform coefficient according to the second state of the data structure and quantize or inverse quantize the current value of the current transform coefficient using the second quantizer.

An optical module processes first FEC (Forward Error Correction) encoded data produced by a first FEC encoder. The optical module has a second FEC encoder for further coding a subset of the first FEC encoded data to produce second FEC encoded data. The optical module also has an optical modulator for modulating, based on a combination of the second FEC encoded data and a remaining portion of the first FEC encoded data that is not further coded, an optical signal for transmission over an optical channel. The second FEC encoder is an encoder for an FEC code that has a bit-level trellis representation with a number of states in any section of the bit-level trellis representation being less than or equal to 64 states. In this manner, the second FEC encoder has relatively low complexity (e.g. relatively low transistor count) that can reduce power consumption for the optical module.

Techniques are disclosed for generating a featureless low-probability-of-intercept/low-probability-of-detection (LPI/LPD) waveform via a continuously variable symbol rate transmission. A continuous-phase-modulation (CPM) signal can be represented with a phase trellis. During each symbol duration, the trellis is traversed in either a positive or negative direction in a continuous fashion from the starting phase value to the end phase value. The rate at which the trellis is traversed is varied continuously as a time-varying function. The time-varying phase velocity function, or instantaneous symbol rate, is a type of spreading code or secret key shared between the transmitter and receiver. The disclosed techniques can be implemented with CPM compromising the constant-modulus property of CPM signals.