H04L25/0286

Can module and method therefor

A CAN module comprising a bit duration compensation component arranged to generate a compensated transmit command signal for controlling the driver component to drive a dominant state on the CAN bus. The compensated transmit command signal comprises dominant bits of a compensated-bit duration T.sub.bit.sub._cp=T.sub.bit.sub._Tx+tc, wherein tc comprises a compensation offset derived at least partly from a difference between a transmit-bit duration of a digital transmit command signal and a receive-bit duration of a received data signal.

On chip adaptive jitter reduction hardware method for LVDS systems
10148261 · 2018-12-04 · ·

A low voltage differential signaling (LVDS) driver circuit, system, apparatus, and methodology are provided for controlling switching components in a primary current stage and a pre-emphasis current stage with an adaptive pre-emphasis gain tuning hardware control circuit arranged to provide control signals for periodically tuning a pre-emphasis gain setting for the secondary pre-emphasis current stage by selecting an optimum pre-emphasis gain setting from a plurality of pre-emphasis gain setting which minimizes an inter-symbol interference (ISI) jitter measure for the LVDS driver circuit.

DRIVER CIRCUIT, OPTICAL MODULE, AND ACTIVE OPTICAL CABLE
20180343063 · 2018-11-29 · ·

There is provided a driver circuit configured to drive a light emitting device, the driver circuit including an asymmetric circuit configured to receive an input signal and include a first capacitor coupled to the input signal and a signal having a fixed electric potential so as to generate a first signal, a delay circuit configured to receive the input signal and delay the input signal so as to generate a second signal, and an adder circuit configured to add the first signal and the second signal so as to generate a drive signal for driving the light emitting device.

Method and apparatus of transmitting signal

The present disclosure discloses a method of transmitting a signal, a wearable communication device and a terminal device. The method includes: receiving, by a wearable communication device, a modulated wave signal transmitted by a terminal device; demodulating the modulated wave signal to obtain a to-be-decoded signal; performing a waveform shaping process on the to-be-decoded signal to obtain a square wave signal, where a high level in the square wave signal is configured to represent a first preset value, and a time interval is existed between two high levels corresponding to any two adjacent first preset values; acquiring time interval eigenvalues in the square wave signal; acquiring a one-to-one mapping relation of the interval eigenvalues and a plurality of coding sequences; and performing, according to the time interval eigenvalues and the mapping relation, a first decoding process and a second decoding process on the square wave signal to obtain original data.

Apparatuses and methods for partial bit de-emphasis
10128843 · 2018-11-13 · ·

Apparatuses and methods for partial bit de-emphasis are provided. An example apparatus includes an output driver and control circuit. The output driver includes a pull-up circuit including one or more pull-up legs, and a pull-down circuit including one or more pull-down legs. The control circuit may be coupled to the output driver and configured to receive an input signal having a first logical value and a second logical value, and in response to determining the logical transition has occurred from the second logic value to the first logic value, cause the pull-up circuit and pull-down circuit respectively to enter a first state for a duration of a first portion of a bit period and to enter a second state for a duration of a second portion of the bit period preceding the first portion.

Integrated circuits for controlling slew rates of signals

An integrated circuit includes a differential signal driver that receives a first signal from a first input terminal, receives a second signal, which is a differential signal of the first signal, from a second input terminal, outputs a first output signal corresponding to the first signal to a first output terminal, and outputs a second output signal corresponding to the second signal to a second output terminal. The integrated circuit further includes a first capacitor unit connected to the first output terminal and controlling a slew rate of the first output signal based on a first capacitance, a second capacitor unit connected to the second output terminal and controlling a slew rate of the second output signal based on a second capacitance, and a phase selection unit that receives the first signal and provides the first signal to the second capacitor unit, and that receives the second signal and provides the second signal to the first capacitor unit, so as to control the slew rates of the first and second output signals.

RADIO FREQUENCY FRONT-END SLEW AND JITTER CONSISTENCY FOR VOLTAGES BELOW 1.8 VOLTS

Systems, methods, and apparatus for managing digital communication interfaces coupled to data communication links are disclosed. In one example, the digital communication interfaces provide methods, protocols and techniques that may be used to provide a common slew rate for signals transmitted on a communication link that may be operated at multiple different voltage ranges. A method may include determining a first voltage range defined for transmitting signals over the communication link when the over the communication link is operated in a first mode of operation, configuring a line driver to operate within the first voltage range with a common slew rate that applies to each of a plurality of modes of operation, and transmitting first data over the communication link in one or more signals that switch within the first voltage range with the common slew rate. Each mode of operation may define a different voltage range for transmitting signals.

User station for a bus system and method for improving the transmission quality in a bus system

A user station for a bus system and a method for improving the transmission quality in a bus system are provided. The user station includes a transceiver for transmitting or receiving a message to/from at least one additional user station of the bus system via the bus system. In the bus system, exclusive, collision-free access to a bus of the bus system by a user station is at least temporarily ensured. The transceiver includes a transmission signal processing device for transmission signal processing of a transmission signal to be transmitted by the transceiver. The transmission signal processing device is configured for setting a predetermined bit symmetry of bits of the transmission signal by generating an internal transmission signal for the message. In the internal transmission signal, the dominant phase of the bits is shortened and the recessive phase of the bits is lengthened.

APPARATUSES AND METHODS FOR PARTIAL BIT DE-EMPHASIS
20180269875 · 2018-09-20 · ·

Apparatuses and methods for partial bit de-emphasis are provided. An example apparatus includes an output driver and control circuit. The output driver includes a pull-up circuit including one or more pull-up legs, and a pull-down circuit including one or more pull-down legs. The control circuit may be coupled to the output driver and configured to receive an input signal having a first logical value and a second logical value, and in response to determining the logical transition has occurred from the second logic value to the first logic value, cause the pull-up circuit and pull-down circuit respectively to enter a first state for a duration of a first portion of a bit period and to enter a second state for a duration of a second portion of the bit period preceding the first portion.

Subscriber station for a bus system and method for improving the quality of reception in a bus system
10063391 · 2018-08-28 · ·

A subscriber station for a bus system and a method for improving the reception quality in the bus system are provided. The subscriber station includes an acquisition device for acquiring a bus state of a bus of the bus system, and a symmetrization device for the symmetrization, on the basis of the result of the acquisition device, of the bit durations and/or of the delay time durations of the rising and falling edge of a bit of signals received from the bus.