Patent classifications
H04L25/03178
Lane adaptation in high-speed serial links
Adaptive equalizer circuitry including both a continuous time equalizer (CTE) and a discrete time equalizer (DTE) and a method of jointly adapting the CTE and DTE in lane adaptation. Jointly adaptation of the CTE and DTE is performed by adapting the DTE at each of a plurality of filter characteristic settings of the CTE and determining a figure of merit for signals filtered by the CTE and DTE at that condition. Adaptation of the DTE may be performed by dynamically adjusting a convergence coefficient based on a history of error gradients. After a figure of merit is determined for each of the plurality of CTE filter characteristics, a CTE filter characteristic setting is then selected based on those figure of merit values, for example at a CTE setting near a midpoint of an acceptable region of figure of merit values.
METHODS AND SYSTEMS FOR PERFORMING ANALYSIS AND CORRELATION OF DOCSIS 3.1 PRE-EQUALIZATION COEFFICIENTS
A method, apparatus and system for implementing pre-equalization equalizer tap analysis and correlation in a DOCSIS 3.1 network environment. The disclosed principles improve the pre-equalization analysis in the DOCSIS 3.1 environment by filtering out short distance reflections, which is required for the proper grouping and correlation of modems.
Grouping and use of short sequence signals
New sequences have been proposed and/or adopted for short Physical Uplink Control Channel communications between base stations and UEs. In an exemplary embodiment, a UE communicates with a base station based on sequence groups that include the new sequences, where the new sequences are allocated to different sequence groups based, at least in part, on correlations with other existing sequences included in individual sequence groups.
Receiver using pseudo partial response maximum likelihood sequence detection
Receivers and receiving methods having maximum likelihood sequence detection with pseudo partial response equalization. One illustrative receiver includes: a feedforward equalizer that produces an equalized receive signal by diminishing a receive signal's intersymbol interference; a decision element that derives initial symbol decisions from samples of the equalized receive signal; and a filter that applies a partial response to the equalized receive signal or to an equalization error signal to produce input for a maximum likelihood sequence detector (MLSD). The MLSD may be a reduced complexity detector that derives a final sequence of symbol decisions by evaluating state metrics only for each initial symbol decision and its competing symbol decision.
Grouping and use of short sequence signals
New sequences have been proposed and/or adopted for short Physical Uplink Control Channel communications between base stations and UEs. In an exemplary embodiment, a UE communicates with a base station based on sequence groups that include the new sequences, where the new sequences are allocated to different sequence groups based, at least in part, on correlations with other existing sequences included in individual sequence groups.
WIRELESS COMMUNICATION SYSTEM, RELAY DEVICE, AND RECEIVING DEVICE
A relay device relaying, to a reception device, a signal stream transmitted by a transmission device through MIMO transmission, the relay device including a lattice base reduction processing unit transforming bases of the signal stream transmitted by the transmission device through MIMO transmission, to increase orthogonality of a lattice of the signal stream, a MIMO equalization unit detecting, by equalization, reception symbols in the signal stream with the bases transformed by the lattice base reduction processing unit, a symbol quantization unit performing quantization by mapping the reception symbols detected by the MIMO equalization unit, to a region on a complex plane delimited by quantization threshold values, and a transmission unit transmitting, to the reception device, at least a signal quantized by the symbol quantization unit.
Phase detection method, phase detection circuit, and clock recovery apparatus
Embodiments of this application disclose example phase detection methods, phase detection circuits, and clock recovery apparatuses. One example method includes receiving a first signal and deciding a (2M−1) level of the first signal to obtain a decision result, where the first signal is a (2M−1)-level signal, and M is a positive integer. A response amplitude parameter of a transmission channel can then be obtained. Clock phase information in the first signal can then be extracted based on the first signal, the decision result, and the response amplitude parameter. Output clock phase information can then be determined based on at least three decision results and at least three pieces of clock phase information in at least three symbol periods.
RECEIVER AND RECEIVE METHOD FOR A PASSIVE OPTICAL NETWORK
A receiver for a passive optical network is provided. The receiver includes an analog-to-digital converter circuitry configured generate a digital receive signal based on an analog receive signal. The analog receive signal is based on an optical receive signal encoded with a binary transmit sequence. The receiver additionally comprises linear equalizer circuitry configured to generate an equalized receive signal by linearly equalizing the digital receive signal. Further, the receiver comprises secondary equalizer circuitry configured to generate soft information indicating a respective reliability of elements in the equalized receive signal using the Viterbi algorithm. In addition, the receiver comprises decoder circuitry configured to generate a digital output signal based on the soft information using soft decision forward error correction.
Low-power complex analog LMS adaptation systems and methods
LMS adaption systems and methods disclosed herein adaptively switch between modes of operation that selectively avoid using the imaginary part of an error signal, in effect, allowing for an LMS adaption that switches between utilizing only the real part of the error signal and utilizing the full complex error signal. Various embodiments take advantage of this added flexibility by implementing a dynamic power saving scheme that, for example, during times when high tracking performance (e.g., high accuracy or high SNR) is not needed, saves power by not energizing a number of multiplier and adder circuits that are expensive in terms of power consumption, thereby, trading power savings for a possible temporary reduction in tracking performance. In embodiments, power savings are accomplished by adaptive power-gating systems and methods that in parts of an analog LMS adaption circuit turn on and off current sources in analog multiplier circuits on demand.
GROUPING AND USE OF SHORT SEQUENCE SIGNALS
New sequences have been proposed and/or adopted for short Physical Uplink Control Channel communications between base stations and UEs. In an exemplary embodiment, a UE communicates with a base station based on sequence groups that include the new sequences, where the new sequences are allocated to different sequence groups based, at least in part, on correlations with other existing sequences included in individual sequence groups.