A method and apparatus for dynamically modifying filter characteristics of a delta-sigma modulator in order to perform signal equalization of a signal in the delta signal modulator. The system is used for wide bandwidth radio system designed to adapt to various global radio standards and, more particularly, to a cellular radio architecture that employs a combination of a single circulator, programmable band-pass sampling radio frequency (RF) front-end and optimized digital baseband that is capable of supporting all current cellular wireless access protocol frequency bands.

A transceiver architecture supports high-speed communication over a signal lane that extends between a high-performance integrated circuit (IC) and one or more relatively low-performance ICs employing less sophisticated transmitters and receivers. The architecture compensates for performance asymmetry between ICs communicating over a bidirectional lane by instantiating relatively complex transmit and receive equalization circuitry on the higher-performance side of the lane. Both the transmit and receive equalization filter coefficients in the higher-performance IC may be adaptively updated based upon the signal response at the receiver of the higher-performance IC.

Disclosed embodiments relate to a system that changes transmitter and/or receiver settings to deal with reliability issues caused by a predetermined event, such as a change in a power state or a clock start event. One embodiment uses a first setting while operating a transmitter during a normal operating mode, and a second setting while operating the transmitter during a transient period following the predetermined event. A second embodiment uses similar first and second settings in a receiver, or in both a transmitter and a receiver employed on one side of a bidirectional link. The first and second settings can be associated with different swing voltages, edge rates, equalizations and/or impedances.

Embodiments of the present disclosure provide methods and apparatus for providing feed forward equalization to a communication line by providing a resistance and a capacitance to the communication line. The method includes determining the resistance based on a desired value of feed forward equalization to provide to a communication line, determining the capacitance based on the desired value of feed forward equalization to provide to the communication line, providing a layer of resistive material between a first conductor and a second conductor of the communication line, wherein a dimension of the layer of resistive material is determined based on the determined resistance and providing a layer of dielectric material between the first conductor and the second conductor, wherein a dimension of the layer of dielectric material is determined based on the determined capacitance.

A system for an orthogonal frequency division multiplexed (OFDM) equalizer, said system comprising a program memory, a program sequencer and a processing unit connected to each other, wherein the processing unit comprises an input selection unit, an arithmetic logic unit (ALU), a coprocessor and an output selection unit; further wherein the program sequencer schedules the processing of one or more symbol-carrier pairs input to said OFDM equalizer using multiple threads; retrieves, for each of the one or more symbol-carrier pairs, multiple program instructions from said program memory; generates multiple expanded instructions corresponding to said retrieved multiple program instructions; and further wherein said ALU performs said processing of the one or more symbol-carrier pairs using the multiple threads across multiple pipeline stages, wherein said processing comprises said ALU executing arithmetic operations to process said expanded instructions using said multiple threads across the multiple pipeline stages.

Embodiments of the present disclosure provide methods and apparatus for providing feed forward equalization to a communication line by providing a resistance and a capacitance to the communication line. The method includes determining the resistance based on a desired value of feed forward equalization to provide to a communication line, determining the capacitance based on the desired value of feed forward equalization to provide to the communication line, providing a layer of resistive material between a first conductor and a second conductor of the communication line, wherein a dimension of the layer of resistive material is determined based on the determined resistance and providing a layer of dielectric material between the first conductor and the second conductor, wherein a dimension of the layer of dielectric material is determined based on the determined capacitance.

Embodiments of the present disclosure provide methods and apparatus for providing feed forward equalization to a communication line by providing a resistance and a capacitance to the communication line. The method includes determining the resistance based on a desired value of feed forward equalization to provide to a communication line, determining the capacitance based on the desired value of feed forward equalization to provide to the communication line, providing a layer of resistive material between a first conductor and a second conductor of the communication line, wherein a dimension of the layer of resistive material is determined based on the determined resistance and providing a layer of dielectric material between the first conductor and the second conductor, wherein a dimension of the layer of dielectric material is determined based on the determined capacitance.

Embodiments are related to systems and methods for data processing, and more particularly to systems and methods for back channel control in a serial data transfer.

In an example, the present invention includes an integrated system-on-chip device. The device is configured on a single silicon substrate member. The device has a data input/output interface provided on the substrate member. The device has an input/output block provided on the substrate member and coupled to the data input/output interface. The device has a signal processing block provided on the substrate member and coupled to the input/output block. The device has a driver module provided on the substrate member and coupled to the signal processing block. In an example, the device has a driver interface provided on the substrate member and coupled to the driver module and configured to be coupled to a silicon photonics device. In an example, a control block is configured to receive and send instruction(s) in a digital format to the communication block and is configured to receive and send signals in an analog format to communicate with the silicon photonics device.

A system for an orthogonal frequency division multiplexed (OFDM) equalizer, said system comprising a program memory, a program sequencer and a processing unit connected to each other, wherein the processing unit comprises an input selection unit, an arithmetic logic unit (ALU), a coprocessor and an output selection unit; further wherein the program sequencer schedules the processing of one or more symbol-carrier pairs input to said OFDM equalizer using multiple threads; retrieves, for each of the one or more symbol-carrier pairs, multiple program instructions from said program memory; generates multiple expanded instructions corresponding to said retrieved multiple program instructions; and further wherein said ALU performs said processing of the one or more symbol-carrier pairs using the multiple threads across multiple pipeline stages, wherein said processing comprises said ALU executing arithmetic operations to process said expanded instructions using said multiple threads across the multiple pipeline stages.