Methods and systems for synchronizing at least one remote local oscillator with a central local oscillator, comprising receiving a remote local oscillator signal from at least one remote local oscillator and a master local oscillator signal from the central local oscillator and in response determining a round-trip phase measurement of temporal delay variability of the duplex real-time link between the remote station and central station, measuring frequency vs. time of the remote local oscillator signal relative to the master oscillator, adjusting the measured frequency vs. time according to the round-trip phase measurement to remove effects of temporal delay variability over the duplex real-time link telemetry, digitally filtering the measured frequency to remove variations in frequency on timescales<10 the round-trip delay and that are known not to be intrinsically due to the remote local oscillator, generating a phase increment signal from the filtered measured frequency, receiving and adjusting the local oscillator signal according to the phase increment signal and in response generating a derived digital domain clock signal that tracks the master local oscillator signal and converting the derived digital domain clock signal to an ultra-low phase-noise time domain voltage clock signal.

A wireless communications device includes a receiver having a phase detector configured to extract frequency offset and provide a corresponding error signal generated based on a baseband version of a received radio frequency signal and an expected transmitted data signal. The receiver has a phase-locked loop configured to generate an error correction signal based on a phase of the error signal and a predicted instantaneous phase of the error signal. The receiver has a correction circuit configured to provide a corrected baseband version of the received radio frequency signal based on the baseband version of the received radio frequency signal and the error correction signal. The receiver may have a re-encoding-based processing circuit configured to provide the expected transmitted data signal based on a preliminarily decoded symbol.