An imaging device including a photoelectric converter including a first electrode, a second electrode, and a photoelectric conversion layer; a voltage supply circuit that applies a bias voltage between the first electrode and the second electrode; an amplifier transistor including a gate electrically connected to the second electrode, the amplifier transistor being configured to output a signal that corresponds to a potential of the gate; and a detection circuit that is configured to detect a level of the signal from the amplifier transistor. The voltage supply circuit applies the bias voltage in a first voltage range, in a case where the level detected by the detection circuit is less than a first threshold value, and applies the bias voltage in a second voltage range that is greater than the first voltage range, in a case where the level detected by the detection circuit is greater than a second threshold value.

Examples of a pixel cell are disclosed. In one example, a pixel cell may include a first semiconductor layer including a photodiode and one or more transistor devices configured to convert charges generated by the photodiode into an analog signal. The pixel cell may also include a second semiconductor layer including one or more transistor devices configured to convert the analog signal to one or more digital signals. The first semiconductor layer and the second semiconductor layer may form a stack structure. In another example, a pixel cell may include a photodiode and a capacitor. The pixel cell may be operated, in a first mode of measurement, to measure the charges stored at the capacitor when the capacitor is electrically coupled with the photodiode, and in a second mode of measurement, to measure the charges stored at the capacitor when the capacitor is electrically isolated from the photodiode.

An image capturing apparatus comprises an image sensor that outputs a first added signal and a first average partial signal amplified by a first gain, and a second added signal and a second averaged partial signal amplified by a second gain, a processing unit that generates a third added signal by synthesizing the first and second added signals with a first ratio and a third averaged partial signal by synthesizing the first and second averaged partial signals with a second or third ratio, a determination unit that determines the first ratio based on the first or second added signal and determines the second ratio based on the first ratios, and changes the second ratio of a pixel group that includes a pixel corresponding to the saturated first or second added signal to the third ratio, which is not based on the first ratio.

The present invention relates to a pixel sensor cell (1) for a CMOS sensor device comprising: a photodiode (11) for generating photoelectrons; a first transfer transistor (12) coupling the photodiode (11) with an intermediate node (IN) and configured to be controlled by a first control signal (TX.sub.1); a gain reducing capacitance (C.sub.HD) applied on the intermediate node (IN); a second transfer transistor (14) coupling the intermediate node (IN) with a sense node (SN) and configured to be controlled by a second control signal (TX.sub.2); an output buffer (15) coupled with the sense node (SN) and configured to amplify a potential on the sense node (SN).

Imaging apparatus (1300, 1400, 1500) includes a semiconductor substrate (1302), which includes at least first and second sensing areas (1306, 1308, 1502, 1514) with a predefined separation between the sensing areas. First and second arrays of pixel circuits (1312) are formed respectively on the first and second sensing areas and define respective first and second matrices of pixels. First and second photosensitive films (1314, 1316, 1402) are disposed respectively over the first and second arrays of pixel circuits, and are configured to output photocharge to the pixel circuits in response to radiation incident on the apparatus in different, respective first and second spectral bands.

The present invention provides a solid state image sensor, an image capturing apparatus, and an image capturing method that can realize a wide dynamic range while suppressing an increase in a signal amount. A solid state image sensor includes a sensor that issues pulses at a frequency corresponding to a frequency at which photons are incident; and a counter circuit that thins out the pulses issued from the sensor at a thinning ratio corresponding to the number of pulses issued from the sensor, and counts the pulses.

The present disclosure relates to a solid-state imaging device, a driving method, and electronic equipment that permit imaging of a wide dynamic range image with higher quality. The solid-state imaging device includes a pixel region and a circuit region. A plurality of pixels that perform photoelectric conversion are arranged in the pixel region. At least a logarithmic conversion circuit is arranged in the circuit region. The logarithmic conversion circuit reads out a pixel signal from the pixel through a logarithmic readout scheme in which the pixel signal changes approximately logarithmically in proportion to the amount of light received by the pixel. Also, the logarithmic conversion circuit can switch between a logarithmic readout scheme and a linear readout scheme when the pixel signal is read out from the pixel. The present technology is applicable, for example, to a CMOS image sensor.

An apparatus includes a plurality of pixels, a plurality of circuits arranged correspondingly to the plurality of pixels, and an output line connected to the plurality of circuits. Each of the circuits generates a signal by converting an analog signal at a first conversion rate and a signal by converting, at a second conversion rate, the analog signal used for generating the signal converted at the first conversion rate. The circuit has a signal obtaining unit configured to obtain a difference signal corresponding to a difference between a signal converted at the first conversion rate and a signal converted at the second conversion rate.

In an active pixel sensor comprising a photodiode Dp, a memory node MN and a readout node SN, the memory node being provided to contain the charge generated by the photodiode at the end of an integration period allowing an integration in global shutter mode and a correlated double sampling, it is envisaged to carry out, in each integration period, at least one transfer {circle around (2)} of charge from the photodiode to the memory node followed by clipping {circle around (3)} of the amount of charge contained in the memory node at an intermediate voltage t.sub.1 after the start of the integration period but before a last transfer of charge {circle around (4)} to the memory node at the end of the integration period. The pixels are subsequently read out, row by row, by correlated double sampling CDS. The one or more intermediate transfers, with clipping, to the memory node during the integration period allow the dynamic range of the sensor to be extended to high levels of ambient light while retaining good sensitivity to low levels of ambient light.

An image sensor pixel may include a photodiode, a floating diffusion, and a transfer gate. Column readout circuitry coupled to the image sensor pixel via a column line. The column readout circuitry may include sample and hold circuitry, comparison circuitry, residual measurement and summation circuitry, counter circuitry, analog-to-digital conversion circuitry, and digital summation circuitry. Column readout circuitry is configured to perform readout operations on a pixel image signal generated for a single frame in one or more portions, thereby extending the dynamic range of the imaging system without modifying pixel structure to generate high-dynamic range images within the single frame.