An image sensor includes a pixel array including a plurality of pixels each including a photosensitive element, and a readout circuit, wherein the pixels are arranged in at least two columns, within each column at least some of the pixels of the column are connected with a common column bus, respectively, for each column the readout circuit includes a first analog-to-digital converter (ADC) and a second ADC, for each column the first ADC is connected with the column bus, and for each column the second ADC is connectable with at least one of the column bus and a reference potential or the second ADC is connected with one optically shielded pixel of the pixel array.

Techniques provided herein are directed toward a simplified correlated double sampling (CDS) circuit that reduces the amount of components and potential noise sources utilized to two switches and a capacitor. Such CDS circuits can be used in conjunction with downstream programmable gain amp (PGA) circuitry to provide double sampling along with variable gain and/or other features. Embodiments may further utilize one or more analog muxes to reduce parasitic capacitance and increase accuracy.

Various techniques are provided to capture one or more thermal image frames using an infrared sensor array that is fixably positioned to substantially de-align rows and columns of infrared sensors. In one example, an infrared imaging system includes an infrared sensor array comprising a plurality of infrared sensors arranged in rows and columns and adapted to capture a thermal image frame of a scene exhibiting at least one substantially horizontal or substantially vertical feature. The infrared imaging system also includes a housing. The infrared sensor array is fixably positioned within the housing to substantially de-align the rows and columns from the feature while the thermal image frame is captured.

In an image capturing apparatus that comprises a pixel area of pixels arranged in a matrix, output circuits apply preset processing to signals read out in parallel from divided areas obtained by dividing the pixel area in a column direction and output the processed signals, a controller performs control to execute first driving for reading out signals corresponding to a predetermined voltage to the output circuits, and second driving for reading out image signals from the pixel area, and a correction circuit generates gain data based on the predetermined voltage for correcting differences between the signals for correction of different columns output for each of the divide areas, and corrects the image signals of the divided areas using the gain data generated for the corresponding divided areas.

The infrared image processing device includes a thermal image sensor that receives infrared rays and outputs a signal corresponding to the infrared rays, a thermal image generation unit that generates a plurality of thermal images based on the signal, a smoothing processing unit that performs a smoothing process on each pixel of each of the plurality of thermal images by using a pixel value of a vicinal pixel, thereby calculating a plurality of smoothed images and calculating smoothed pixel values that are each image’s pixel values after undergoing the smoothing, a correction coefficient calculation unit that calculates a correction coefficient set including a first correction coefficient and a second correction coefficient from the thermal images and the smoothed images, and a thermal image correction unit that corrects the thermal images by using the correction coefficient set.

A photoelectric conversion device includes a plurality of pixels, a plurality of output lines, to which signals from corresponding pixels are output, respectively, an amplification unit arranged corresponding to each of the plurality of output lines and configured to amplify a signal output to a corresponding output line, a comparison unit arranged corresponding to each of the plurality of output lines and having a first input terminal and a second input terminal, a signal corresponding to an output of the amplification unit being input to the first input terminal, a reference signal being input to the second input terminal, and a switch connecting nodes of the plurality of output lines. During a period before an offset clamping operation is completed, the switch is turned on.

A solid-state imaging device including: a pixel array unit in which a plurality of pixels outputting an analog pixel signal are arranged in a two-dimensional matrix form; a ramp signal generation unit configured to generate and output a ramp wave; a clock generation unit configured to generate and output multiphase clocks; and a signal-processing unit, wherein the signal-processing unit including: a plurality of analog-to-digital conversion circuits, and a plurality of repeater circuits, wherein each of the plurality of analog-to-digital conversion circuits includes: a comparison unit, and a latch unit, wherein each of the plurality of the analog-to-digital conversion circuits outputs the digital value according to the state of the phase held by each latch circuit, and wherein each of the plurality of the repeater circuits corresponding to the same set are arranged side by side, and the repeater circuits are connected in series.

A method for processing a raw image characterized by raw measurements S.sub.p(i,j) that are associated with active bolometers B.sub.pix_(i,j) of an imager, which bolometers are arranged in a matrix array, the imager being at an ambient temperature T.sub.amb and furthermore comprising blind bolometers B.sub.b_(k), the method, which is executed by a computer that is provided with a memory, comprising the following steps: a) a step of calculating the electrical resistances R.sub.Tc(i,j) and R.sub.Tc(k), at the temperature T.sub.amb, of the active and blind bolometers, respectively, from their respective electrical resistances R.sub.Tr(i,j) and R.sub.Tr(k) at a reference temperature T.sub.r, said resistances being stored in the memory; b) a step of determining the temperatures T.sub.sc(i,j) actually measured by each of the active bolometers B.sub.pix_(i,j) from the electrical resistances calculated in step a) and from the raw measurements S.sub.p(i,j).

Techniques are described for error-modulated pixel readout by column-parallel programmable gain amplifiers (PGAs) in a digital image sensor. Each PGA has an amplifier with gain set by a ratio of input and feedback capacitors. Mismatch between these capacitors can manifest as vertical fixed pattern noise (FPN) in the image output. Embodiments use a swap control signal to pseudo-randomly toggle between two or more swap states for each of a sequence of row scan times. Each swap state at least directs coupling of a particular capacitor network in either the input or the feedback path of the amplifier. Pseudo-randomly swapping those couplings of the capacitive networks also pseudo-randomly modulates gain error from capacitive mismatch between the capacitor networks. The FPN effectively becomes spatially modulated noise at a level far below what would be considered as a visible artifact in the image output.

Provided is an image sensor having a column ADC configuration including, for every pixel row, an analog digital converter (ADC) that converts a pixel signal including an analog signal generated by photoelectric conversion into an output signal including a digital signal. The image sensor includes a plurality of clamp operation units each configured to calculate a reference level based on each output signal of a plurality of ADC groups, and a reference voltage output unit configured to convert a digital signal of the reference level calculated by the clamp operation unit into a reference voltage including an analog signal, and supply the reference voltage to each the ADC that constitutes the ADC group.