Methods of manufacture are described. A method includes forming a first cavity in a substrate and placing a backplane in the first cavity. At least one layer of dielectric material is formed over the substrate and the backplane. A second cavity is formed in the at least one layer of the dielectric material to expose at least a portion of a surface of the backplane. A heat conductive material is placed in the second cavity and in contact with the at least the portion of the surface of the backplane.

In an embodiment, a printed circuit board substrate (12) comprises a polymer matrix; a reinforcing layer (42); and a plurality of coated boron nitride particles (44); wherein the plurality of coated boron nitride particles comprise a coating having an average coating thickness of 1 to 100 nanometers. The polymer matrix can comprise at least one of an epoxy, a polyphenylene ether, polystyrene, an ethylene-propylene dicyclopentadiene copolymer, a polybutadiene, a polyisoprene, a fluoropolymer, or a crosslinked matrix comprising at least one of triallyl cyanurate, triallyl isocyanurate, 1,2,4-trivinyl cyclohexane, trimethylolpropane triacrylate, or trimethylolpropane trimethacrylate.

An illumination assembly includes a polymeric substrate, an electrical circuit including two conductors supported by the polymeric substrate, an LED electrically coupled to the two conductors, and a heat spreader thermally coupled to the LED. The two conductors can be printed on the polymeric substrate, embedded within the polymeric substrate, or lie atop the polymeric substrate. The illumination assembly may be fabricated in three-dimensional form factors.

An electronic control device includes a first circuit board having a first mounting surface on which a first electronic component is mounted, a second circuit board having a second mounting surface on which a second electronic component is mounted, and a base member disposed between the first mounting surface and the second mounting surface so as to face the first electronic component and the second electronic component, where a first heat-conducting material is disposed between the base member and the first electronic component, a second heat-conducting material is disposed between the base member and the second electronic component, the base member includes a first region that at least does not overlap the second circuit board when viewed in a line-of-sight direction normal to the first mounting surface and the second mounting surface, and a second region that overlaps both of the first circuit board and the second circuit board when viewed in the line-of-sight direction, a heat dissipation unit including a plurality of heat dissipation fins is provided in the first region of the base member, and a ventilation hole penetrating between the heat dissipation unit and an outside is provided in the second region of the base member.

A UV reactor irradiates a flow of fluid with UV radiation. The reactor comprises: a fluid conduit defined by a heat conducting conduit body comprising one or more heat conducting walls for permitting a flow of fluid therethrough; a UV-LED operatively connected to a PCB and oriented for directing radiation into the fluid conduit. The PCB comprises a heat conducting substrate having a first surface. The conduit body is in thermal contact with the first surface of the heat conducting substrate. Heat is dissipated from the UV-LED via the heat conducting substrate, the thermal contact between the first surface of the heat conducting substrate and the heat conducting conduit body, and from the one or more heat conducting walls of the heat conducting conduit body to the fluid flowing through the fluid conduit.

A solder material for use in electronic assembly, the solder material comprising: solder layers; and a core layer comprising a core material, the core layer being sandwiched between the solder layers, wherein: the thermal conductivity of the core material is greater than the thermal conductivity of the solder.

A printed circuit board comprises N power switching cells operating in parallel and respectively comprising a transistor leg, at least one decoupling capacitor and a gate driver circuit. Each transistor leg comprises respective first and second transistors in series, a drain of the first transistor being connected to a positive DC line, a source of the second transistor being connected to a negative DC line, a source of the first transistor being connected to a drain of the second through a connection middle-point connected to an output terminal. Each gate driver circuit controls respective switching ON and OFF of the corresponding first and second transistors. The N transistor legs of the corresponding N power switching cells are positioned to substantially form a convex polygon having N edges of substantially the same length, each one of the N transistor legs being positioned along one of the edges of the convex polygon.

A Thermal Interface Material (TIM) for chip warpage may be provided. A system may comprise an Integrated Circuit (IC) chip, a Thermal Interface Material (TIM) layer disposed on the IC chip, and a heatsink disposed on the TIM layer. The heatsink may comprise, a plate, a plurality of fins, and at least one TIM storage chamber disposed in the plate between two of the plurality of fins. The at least one TIM storage chamber may be filled with a TIM that is solid at a lower temperature end of a thermal cycle of the IC chip and that is liquid at a higher temperature end of the thermal cycle of the IC chip.

A thermal interface for discrete semiconductor devices (such as IGBT's) having a thermally conductive structure, a PCB populated with discrete electronic components, and each of the discrete semiconductor devices having a housing extending beyond the edge of the PCB and in a direction substantially parallel to a plane of the PCB, and a clamp bar secured to the thermally conductive structure adapted to compressively secure each housing to the thermally conductive structure and adapted to maintain thermal contact between a surface of each housing and the surface of the thermally conductive structure. A thermally conductive and electrically insulative pad is positioned between the semiconductor device housing and the thermally conductive structure. A casing enclosing the interface and PCB includes the thermally conductive structure formed on a backwall of the casing.

A circuit board includes a composite structure layer, at least one conductive structure, a thermally conductive substrate, and a thermal interface material layer. The composite structure layer has a cavity and includes a first structure layer, a second structure layer, and a connecting structure layer. The first structure layer includes at least one first conductive member, and the second structure layer includes at least one second conductive member. The cavity penetrates the first structure layer and the connecting structure layer to expose the second conductive member. The conductive structure at least penetrates the connecting structure layer and is electrically connected to the first conductive member and the second conductive member. The thermal interface material layer is disposed between the composite structure layer and the thermally conductive substrate, and the second structure layer is connected to the thermally conductive substrate through the thermal interface material layer.