Embodiments of the present disclosure relate to the field of communication device technology, which provide a circuit board including a first signal line and a second signal line that are disposed adjacent to each other, a ground plane, and a conductive layer connected to the ground plane. The conductive layer is disposed between the first signal line and the second signal line. Embodiments of the present disclosure further provide a communication device.

A circuit board may include a traditional via electrically coupled to a first layer of the circuit board and coupled to a second layer of the circuit board and a slotted via formed within the circuit board proximate to the traditional via, the slotted via comprising an opening through a first surface and a second surface of the circuit board and a layer of conductive material formed on interior walls of the opening.

An optical module, including: a first laser and a first laser chip for driving the first laser; a second laser and a second laser chip for driving the second laser; and a multi-layer circuit board, including a surface layer, a reference layer, and an intermediate layer provided between the surface layer and the reference layer, where a first row of edge connector pins and a second row of edge connector pins are disposed in at least one surface layer; the first row of edge connector pins are disposed to be closer than the second row of edge connector pins to a side edge, of the multi-layer circuit board, that is provided with an edge connector; and a region, of the intermediate layer, that corresponds to a data signal line pin in the second row of edge connector pins is a hollow region.

A flexible resonant trap circuit is provided that includes a transmission line arranged to include a helical winding that has a first helical winding segment and a second helical winding segment; and a capacitor coupled between the first and second helical winding segments.

A printed circuit board includes a plurality of layers including attachment layers and routing layers; and columns of via patterns formed in the plurality of layers, wherein via patterns in adjacent columns are offset in a direction of the columns, each of the via patterns comprising: first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; and at least one conductive shadow via located between the first and second signal vias of the differential pair. In some embodiments, at least one conductive shadow via is electrically connected to a conductive surface film.

Provided is a semiconductor package including a pair of differential signal wiring lines including a first differential signal wiring line and a second differential signal wiring line, extending parallel to and spaced apart from each other, a lower equal potential plate in a lower wiring layer under the signal wiring layer, an upper equal potential plate in an upper wiring layer above the signal wiring layer, and a wiring insulating layer adjacent to the pair of differential signal wiring lines, the lower equal potential plate, and the upper equal potential plate, the wiring insulating layer filling spaces between the signal wiring layer, the lower wiring layer, and the upper wiring layer, at least one of the lower equal potential plate and the upper equal potential plate including an impedance opening overlapping the pair of differential signal wiring lines in a vertical direction and is filled by the wiring insulating layer.

A microwave transmission line assembly operated in vacuum for satellite antennas and beamforming networks comprising a first ground plane and a conductor strip positioned a distance from the first ground plane. The conductor strip comprises a first strip portion and a second strip portion (6). The first strip portion is positioned at a first distance from the first ground plane and wherein the second strip portion is positioned at a second distance from the first ground plane. The first distance is smaller than the second distance, wherein the first distance is chosen to avoid multipaction.

Various embodiments of the disclosure relate to a printed circuit for transmitting a signal in a high-frequency band and an electronic device including the same. The printed circuit board may include a flexible circuit board configured to transmit a signal in a high-frequency band, and the flexible circuit board may include: first multiple layers including a power line configured to transmit power; and second multiple layers stacked in a first direction of the first multiple layers and including a first signal line and a second signal line configured to transmit a signal in the high-frequency band. The first multiple layers may include a first punched region in which at least a portion overlapping the first signal line and the second signal line is removed, the second multiple layers may include a second punched region in which at least a portion overlapping the power line is removed, and at least a portion of the second punched region and the first punched region overlap each other forming a slit penetrating the flexible circuit board in the first direction.

A printed circuit board of an information handling system includes a dielectric layer, adjacent differential pairs, a ground layer, and a ground wall. The adjacent differential pairs are plated on the dielectric layer, and generate crosstalk between each other. The ground wall is in physical communication with and electrically coupled to the ground layer. The ground wall extends substantially perpendicular from the ground layer through the dielectric layer. A top surface of the ground wall is a specific height above a top surface of the adjacent different pairs. The ground wall suppresses the generated crosstalk based on the specific height and a width of the ground wall.

A printed circuit board (PCB) includes first and second signal voids and a guard trace formed on a surface of the PCB. The first and second signal voids are for connecting to signal contacts of a high-speed data communication interface. The guard trace is located between the first signal void and the second signal void. The PCB further includes first, second, and third ground vias that couple the guard trace to a ground plane of the PCB. The first ground via is located at a first end of the guard trace. The second ground via is located at a second end of the guard trace. The third ground via is located between the first via and the second via.