A grounding structure of the high-frequency circuit board includes a dielectric substrate, a back surface ground electrode, an upper ground electrode, and a microstripline upper electrode. The dielectric substrate has a first surface and a second surface, and is provided with a first through-hole. A first opening of the first through-hole at the first surface is smaller than a second opening of the first through-hole at the second surface. A first grounding conductor layer is provided in the first through-hole. The back surface ground electrode is provided at the second surface and is connected with the first grounding conductor layer. The upper ground electrode is provided at the first surface and is connected with the first ground conductor layer. The microstripline upper electrode is provided at the first surface.

A printed circuit board transmission line utilized as a millimeter wave attenuator is provided. The printed circuit board transmission line includes a transmission line and a signal feed part. The transmission line has a first terminal and a second terminal. The signal feed part is electrically connected to the first terminal. The transmission line has a predetermined line width and a predetermined line length. The signal feed part receives an external signal, and the external signal is outputted from the second terminal through the transmission line. According to a degree of signal loss required in a practical application, the signal loss of the transmission line can be between 3 decibels and 40 decibels through a cooperation of the predetermined line width and the predetermined line length. Further, when the transmission line is utilized as a millimeter wave termination, the signal loss of the transmission line is 20 decibels.

A module board and a memory module are provided. The module board includes a first branch line for connecting a clock signal terminal disposed on at least one surface to a first branch point; a first signal line for connecting the first branch point to a first module clock signal terminal; a second signal line for connecting the first module clock signal terminal to the k.sup.th module clock signal terminal and a first termination resistance terminal; a third signal line for connecting the first branch point to a (k+1).sup.th module clock signal terminal; and a fourth signal line for connecting the (k+1).sup.th module clock signal terminal to a 2k.sup.th module clock signal terminal and the second termination resistance terminal, wherein a length of the third signal line is greater than a sum of a length of the first signal line and a length of the second signal line.

Embodiments described herein relate to a method for modifying transmission line characteristics. The method may include: making a first determination of a null frequency of an input signal to a transmission line; performing an analysis to make a second determination of a wavelength of the input signal using, at least in part, the null frequency; making a third determination, based on the analysis, of a half wavelength of the input signal; calculating, based on the half wavelength, a total stub length; and adding a trace to a stub associated with a via, wherein the stub and the trace are a length that is at least a portion of the half wavelength of the input signal.

A low current line termination circuit includes first and second input interfaces each configured to receive a Vreceive+ and a Vreceive− voltage, respectively. The circuit further includes a first diode connected transistor (“DCT”) coupled to the second input interface, a first switching transistor (“ST”) coupled to the first DCT and to the first input interface, and a first delay element coupled between one of the input interfaces and a gate of the first ST. The circuit further includes a second DCT coupled to the one of the two input interfaces, a second ST coupled to the second DCT and to the second input interface, and a second delay element coupled between another of the two input interfaces and a gate of the second ST.

A receiving apparatus includes a terminating network for a three-wire serial bus and a feedback circuit. Each wire of the three-wire serial bus may be coupled through a resistance to a common node of the terminating network. The feedback circuit has a first amplifier circuit having an input coupled to the common node, a comparator that receives an output of the first amplifier circuit as a first input and a reference voltage as a second input, and a second amplifier circuit responsive to an output of the comparator and configured to inject a current through the common node.

A module board and a memory module are provided. The module board includes a first branch line for connecting a clock signal terminal disposed on at least one surface to a first branch point; a first signal line for connecting the first branch point to a first module clock signal terminal; a second signal line for connecting the first module clock signal terminal to the k.sup.th module clock signal terminal and a first termination resistance terminal; a third signal line for connecting the first branch point to a (k+1).sup.th module clock signal terminal; and a fourth signal line for connecting the (k+1).sup.th module clock signal terminal to a 2k.sup.th module clock signal terminal and the second termination resistance terminal, wherein a length of the third signal line is greater than a sum of a length of the first signal line and a length of the second signal line.

Embodiments described herein relate to a method for modifying transmission line characteristics. The method may include: making a first determination of a null frequency of an input signal to a transmission line; performing an analysis to make a second determination of a wavelength of the input signal using, at least in part, the null frequency; making a third determination, based on the analysis, of a half wavelength of the input signal; calculating, based on the half wavelength, a total stub length; and adding a trace to a stub associated with a via, wherein the stub and the trace are a length that is at least a portion of the half wavelength of the input signal.

Methods and apparatuses for vertically transitioning signals between substrate integrated waveguides within a multilayered printed circuit board (PCB) are disclosed. A first substrate integrated waveguide (SIW) is provided in a first layer of the PCB, the first SIW having a first terminal portion. A second SIW is provided in a second layer of the PCB, the second SIW having a second terminal portion that overlaps with the first terminal portion, wherein a first ground plane separates the first SIW and the second SIW. A vertical transition comprising an aperture in the first ground plane that is disposed in an area defined by the overlap of the first terminal portion and the second terminal portion, such that a signal propagated in the first SIW transitions to the second SIW in a different layer through the aperture.

A network switch includes a circuit board and a plurality of transmission ports. The circuit board is disposed in a chassis, and an opening of the chassis is corresponding to a first reference line. The plurality of transmission ports are disposed on an edge of the circuit board. The edge is corresponding to a second reference line, and the first reference line and the second reference line form an acute angle.