Provided is a display apparatus including: a display panel including a display area and a peripheral area; a printed circuit board attached to the peripheral area and including a ground portion and a test electrode spaced apart from the ground portion; a connector including a plurality of connector terminals connected to an external control apparatus and electrically connecting the printed circuit board and the external control apparatus to each other; and a cover layer arranged on the printed circuit board and covering at least a part of the printed circuit board. Accordingly, not only the display quality and reliability of the electric characteristics of the display apparatus are improved, but also a loss is reduced and a yield is improved during manufacturing processes.

A component includes a plurality of electrical connections on a process side opposed to a back side of the component. Each electrical connection includes an electrically conductive multi-layer connection post protruding from the process side. A printed structure includes a destination substrate and one or more components. The destination substrate has two or more electrical contacts and each connection post is in contact with, extends into, or extends through an electrical contact of the destination substrate to electrically connect the electrical contacts to the connection posts. The connection posts or electrical contacts are deformed. Two or more connection posts can be electrically connected to a common electrical contact.

An example sensor interposer employing castellated through-vias formed in a PCB includes a planar substrate defining a plurality of castellated through-vias; a first electrical contact formed on the planar substrate and electrically coupled to a first castellated through-via; a second electrical contact formed on the planar substrate and electrically coupled to a second castellated through-via, the second castellated through-via electrically isolated from the first castellated through-via; and a guard trace formed on the planar substrate, the guard trace having a first portion formed on a first surface of the planar substrate and electrically coupling a third castellated through-via to a fourth castellated through-via, the guard trace having a second portion formed on a second surface of the planar substrate and electrically coupling the third castellated through-via to the fourth castellated through-via, the guard trace formed between the first and second electrical contacts to provide electrical isolation between the first and second electrical contacts.

A wiring board includes core substrate, a first build-up layer on first surface of the substrate and including conductive and insulating resin layers, and a second build-up layer on second surface of the substrate and including conductive and insulating resin layers. The first build-up is formed such that each conductive layer includes a metal foil layer and a plating layer on the foil layer and the foil layer of a conductive layer on an outermost resin layer has thickness greater than thickness of the foil layer of a conductive layer on a non-outermost resin layer, and the second build-up is formed such that each conductive layer includes a metal foil layer and a plating layer on the foil layer and the foil layer of a conductive layer on an outermost resin layer has thickness greater than thickness of the foil layer of a conductive layer on a non-outermost resin layer.

Embodiments include a transmission line-land grid array (TL-LGA) socket assembly, a TL-LGA socket, and a package substrate. The TL-LGA socket assembly includes a TL-LGA socket having an interconnect in a housing body, the interconnect includes a vertical portion and a horizontal portion. The housing body has a top surface and a bottom surface, where the top surface is a conductive layer. The TL-LGA socket assembly also includes a package substrate having a base layer having a signal pad and a ground strip. The base layer is above the conductive layer of the housing body of the TL-LGA socket. The ground strip is above the horizontal portion of the interconnect and adjacent to the signal pad. The horizontal portion is coupled to the signal pad on the base layer. The package substrate may have a pad with a reduced pad area.

The disclosure relates to systems and methods for using additive manufacturing techniques for fabricating ball grid array (BGA) surface mounting pads (SMP), and surface mounted technology devices (SMT) package sockets. More specifically, the disclosure relates to additive manufacturing methods for additively manufactured electronic (AME) circuits such as a printed circuit board (PCB), and/or flexible printed circuit (FPC), and/or high-density interconnect printed circuit board (HDIPCB) each having integrated raised and/or sunk BGA SMP, and or surface mounting sockets for SMT device(s) defined therein, and methods of coupling surface mounted devices such as BGA and/or SMT thereto.

Disclosure provides an adapter board and a method for making the adapter board, which includes providing a mold in which a plurality of first fixing plates and second fixing plates are provided, providing a plurality of wires sequentially passed through the plurality of first fixing plates and the second fixing plate, injecting a non-conductive material into the cavity to form a body, and cutting the body along both sides of the first fixing plates and the second fixing plates to obtain a plurality of board bodies. The first fixing plates are provided with a plurality of first fixing holes, and the second fixing plates are provided with a plurality of second fixing holes. The board body includes a first surface and a second surface. A plurality of first connection pads are formed on the first surface, and a plurality of second connection pads are formed on the second surface.

An electronic substrate connects to a semiconductor component via a plurality of front surface terminals disposed in an array on a front surface and connects to a main substrate via a plurality of back surface terminals disposed in an array on a back surface. The electronic substrate includes: a first wiring that electrically connects the front surface terminals and the back surface terminals in the electronic substrate and is supplied with power supply from the main substrate via the back surface terminals; and a second wiring that electrically connects the front surface terminals and the back surface terminals in the electronic substrate, is supplied with power supply having the same potential as the first wiring from the main substrate via the back surface terminals, and is not electrically connected to the first wiring in the electronic substrate.

A wiring board and a method of manufacturing the same are provided. The method includes the following steps. A substrate is provided. The substrate is perforated to form at least one through hole. A first conductive layer is integrally formed on a surface of the substrate and an inner wall of the through hole. An etch stop layer is formed on a portion of the first conductive layer on the surface of the substrate and another portion of the first conductive layer on the inner wall of the through hole. A second conductive layer is integrally formed on the etch stop layer and the first conductive layer on the inner wall of the through hole. A plug-hole column is formed by filling with a plugged-hole material in the through hole. The second conductive layer is removed. The etch stop layer is then removed.

A printed circuit board (PCB) connector interface module and an accessory system. The module including a first layer, a second layer, and a plurality of inner layers. The first layer includes a first set of contact pads configured to electrically connect to an accessory device, and a heat and scratch resistant coverlay that is adjacent to and has a first surface that is level with a first surface of the first set of contact pads. The second layer including a second set of contact pads configured to electrically connect to an internal printed circuit board (PCB) of an electronic apparatus. The plurality of inner layers including one or more printed circuit boards (PCB) and a plurality of contact vias, wherein the plurality of contact vias electrically connect the first set of contact pads to the second set of contact pads.