Patent classifications
H05K1/112
Board-to-board connecting structure and method for manufacturing the same
A board-to-board connecting structure which adds no significant thickness to a single printed circuit board includes a first circuit board and a second circuit board. The first circuit board includes first circuit substrate, adhesive layer, and second circuit substrate. The first circuit substrate includes first base layer, first inner wiring layer with first pad, and first outer wiring layer defining a receiving space. The second circuit substrate includes insulating layer and two second outer wiring layers. A conductive via in the second circuit substrate connects the two second outer wiring layers. The second circuit board includes second base layer and also two third outer wiring layers each with a second pad. The second circuit board is laterally disposed in the receiving space and one second pad connects to the conductive via and the other to the first pad.
PRINTED CIRCUIT BOARD AND ELECTRONIC PACKAGE COMPRISING THE SAME
A printed circuit board includes a first insulating layer; a first wiring layer having at least a portion buried in one surface side of the first insulating layer and having at least a portion of one surface exposed from the one surface of the first insulating layer; a metal post disposed on the exposed one surface of at least the portion of the first wiring layer; and a second wiring layer disposed on the other surface of the first insulating layer. A width of a first surface, connected to the exposed one surface of at least a portion of the first wiring layer, of the metal post, is greater than a width of a second surface of the metal post opposing the first surface.
Circuit board and unmanned aerial vehicle including the same
A circuit board includes a board body including a wiring; a micro-control unit, arranged on the board body; and an inertial measurement unit arranged on the board body and in communication with the micro-control unit via the wiring to transmit inertial measurement data detected by the inertial measurement unit to the micro-control unit, and where the board body includes a main body part and an isolated part located at a peripheral of the main body part, the micro-control unit is supported on the main body part, and the inertial measurement unit is supported on the isolated part.
PROBE CARD TESTING DEVICE
A probe card testing device includes a first sub-circuit board, a second sub-circuit board, a connecting structure layer, a fixing plate, a probe head and a plurality of conductive probes. The first sub-circuit board is electrically connected to the second sub-circuit board by the connecting structure layer. The fixing plate is disposed on the second sub-circuit board and includes an opening and an accommodating groove. The opening penetrates the fixing plate and exposes a plurality of pads on the second sub-circuit board. The accommodating groove is located on a side of the fixing plate relatively far away from the second sub-circuit board and communicates with the opening. The probe head is disposed in the accommodating groove of the fixing plate. The conductive probes are set on the probe head and in the opening of the fixing plate. One end of the conductive probes is in contact with the corresponding pads, respectively.
GLASS CORE ARCHITECTURES WITH DIELECTRIC BUFFER LAYER BETWEEN GLASS CORE AND METAL VIAS AND PADS
In one embodiment, a substrate includes a glass core layer defining a plurality of holes between a first side of the glass core layer and a second side of the glass core layer opposite the first side and a conductive metal inside the holes of the glass core layer. The conductive metal electrically couples the first side of the glass core layer and the second side of the glass core layer. The substrate also includes a dielectric material between the conductive metal and the inside surfaces of the holes of the glass core layer.
WIRING BOARD, SEMICONDUCTOR DEVICE, AND WIRING BOARD MANUFACTURING METHOD
A wiring board includes a first wiring layer, an insulating layer that is arranged on the first wiring layer, and a second wiring layer that is arranged on the insulating layer. The first wiring layer includes a first plain layer, an opening that penetrates through the first plain layer, and a reinforcing pad that is arranged in the opening. The second wiring layer includes a second plain layer. The insulating layer includes a reinforcing via that connects the reinforcing pad and the second plain layer.
STORAGE DEVICES AND METHODS OF OPERATING STORAGE DEVICES
A storage device is provided. The storage device includes nonvolatile memory devices provided on a printed circuit board (PCB), a connector, a storage controller and at least one first passive filter. The connector is provided in the PCB and includes connection terminals. The storage controller is provided on the PCB, communicates with an external host through the connection terminals and controls the nonvolatile memory devices. The at least one first passive filter is provided in the PCB, is connected between the connector and the storage controller, and performs an equalization on either a signal provided to the storage controller or a signal provided from the storage controller.
MULTILAYER CERAMIC CAPACITOR
A multilayer ceramic capacitor includes an interposer including, on a side in a length direction, a first through conductive portion that penetrates the interposer in a stacking direction, and provides electrical conduction between a first joining electrode and a first mounting electrode. The interposer includes, on the other side in the length direction, a second through conductive portion that penetrates the interposer in the stacking direction, and provides electrical conduction between a second joining electrode and a second mounting electrode. The first mounting electrode includes a first portion that covers a portion of a first interposer end surface on the one side in the length direction of the interposer. The second mounting electrode includes a second portion that covers a portion of a second interposer end surface on the other side in the length direction of the interposer.
MULTILAYER CERAMIC CAPACITOR
In a multilayer ceramic capacitor, an interposer includes, on a side of a first external electrode in a length direction, a first through hole that penetrates the interposer in a stacking direction, and provides electrical conduction between a first joining electrode and a first mounting electrode. The first through hole further includes a first metal film provided on an inner wall thereof. The interposer includes, on a side of a second external electrode in the length direction, a second through hole that penetrates the interposer in the stacking direction, and provides electrical conduction between a second joining electrode and a second mounting electrode. The second through hole further includes a second metal film provided on an inner wall thereof. A first uncovered portion is provided, which is not covered by the first metal film, on a first surface of the inner wall of the first through hole, and a second uncovered portion is provided which is not covered by a second metal film on the first surface of the inner wall of the second through hole.
Wiring substrate
A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate conductor layers, second conductor layers including second inner, outer and intermediate conductor layers, interlayer insulating layers interposed between the first conductor layers and between the second conductor layers, and via conductors formed in the core layer such that each via conductor decreases in diameter from one of the inner conductor layers toward the other one of the inner conductor layers and that the other one of the inner conductor layers has thickness greater than thickness of the one of the inner conductor layers. The first and/or second inner conductor layers includes a first laminated structure including metal foil and plating film layers, the first and/or second outer conductor layers includes the first laminated structure, and the first and/or second intermediate conductor layers includes a second laminated structure including metal foil and plating film layers.