Depicted embodiments are directed to an Application Specific Electronics Packaging (ASEP) system, which enables the manufacture of additional products using reel to reel (68a, 68b) manufacturing processes as opposed to the batch processes used to currently manufacture electronic products and MIDs. Through certain ASEP embodiments, it is possible to integrate connectors, sensors, LEDs, thermal management, antennas, RFID devices, microprocessors, memory, impedance control, and multi-layer functionality directly into a product.

A circuit board is formed from a catalytic laminate having a resin rich surface with catalytic particles dispersed below a surface exclusion depth. Trace channels and apertures are formed into the catalytic laminate, electroless plated with a metal such as copper, filled with a conductive paste containing metallic particles, which are then melted to form traces. In a variation, multiple circuit board layers have channels formed into the surface below the exclusion depth, apertures formed, are electroless plated, and the channels and apertures filled with metal particles. Several such catalytic laminate layers are placed together and pressed together under elevated temperature until the catalytic laminate layers laminate together and metal particles form into traces for a multi-layer circuit board.

An object of the present invention is to provide a method for easily producing an electroconductive laminate having a three-dimensional shape and having a metal layer disposed thereon (for example, an electroconductive laminate having a three-dimensional shape including a curved surface and a metal layer disposed on the curved surface). Another object of the present invention is to provide a three-dimensional structure with a plated-layer precursor layer, a three-dimensional structure with a patterned plated layer, an electroconductive laminate, a touch sensor, a heat generating member, and a three-dimensional structure. The method for producing an electroconductive laminate of the present invention has a step of obtaining a three-dimensional structure with a plated-layer precursor layer including a three-dimensional structure and a plated-layer precursor layer disposed on the three-dimensional structure and having a functional group capable of interacting with a plating catalyst or a precursor thereof and a polymerizable group; a step of applying energy to the plated-layer precursor layer to form a patterned plated layer; and a step of subjecting the patterned plated layer to a plating treatment to form a patterned metal layer on the plated layer.

A wiring substrate includes a first insulating layer, a conductor layer formed on the first insulating layer and including a wiring pattern, an organic coating film formed on the conductor layer such that the organic coating film is formed on the wiring pattern of the conductor layer, and a second insulating layer formed on the first insulating layer such that the second insulating layer is covering the conductor layer. The conductor layer is formed such that the wiring pattern has a polished surface on the opposite side with respect to the first insulating layer, and the organic coating film is formed on the wiring pattern of the conductor layer such that the organic coating film is covering the polished surface of the wiring pattern.

A catalytic resin is formed by mixing a resin and either homogeneous or heterogeneous catalytic particles, the resin infused into a woven glass fabric to form an A-stage pre-preg, the A-stage pre-preg cured into a B-stage pre-preg, thereafter held in a vacuum and between pressure plates at a gel point temperature for a duration of time sufficient for the catalytic particles to migrate away from the resin rich surfaces of the pre-preg, thereby forming a C-stage pre-preg after cooling. The C-stage pre-preg subsequently has trenches formed by removing the resin rich surface, the trenches extending into the depth of the catalytic particles, optionally including drilled holes to form vias, and the C-stage pre-preg with trenches and holes placed in an electroless bath, whereby traces form in the trenches and holes where the surface of the cured pre-preg has been removed.

A method for selective metallization includes: selectively adsorbing catalytic nanoparticles onto an imprint mold to form a selectively adsorbed catalytic nanoparticle (SACN) mold; using the SACN mold in an imprinting process to synchronously transfer a pattern and the catalytic nanoparticles onto a film; separating the film from the SACN mold; and selectively depositing metal onto the film based on the pattern transferred to the film.

Depicted embodiments are directed to an Application Specific Electronics Packaging (ASEP) system, which enables the manufacture of additional products using reel to reel (68a, 68b) manufacturing processes as opposed to the batch processes used to currently manufacture electronic products and MIDs. Through certain ASEP embodiments, it is possible to integrate connectors, sensors, LEDs, thermal management, antennas, RFID devices, microprocessors, memory, impedance control, and multi-layer functionality directly into a product.

A method for application of a metal on a substrate comprises a) contacting at least a part of the surface of the substrate with at least one initiator, and polymerizable units with the ability to undergo a chemical reaction to form a polymer, the polymer comprising at least one charged group, wherein the contacting is achieved by contacting a pad with a plate comprising the at least one initiator and the polymerizable units and subsequently contacting the pad with the surface of the substrate, thereby transferring the at least one initiator and the polymerizable units to the surface of the substrate. Subsequently a metal layer is produced on the surface. The compactness of the applied metal layer is increased.

A circuit board is formed from a catalytic laminate having a resin rich surface with catalytic particles dispersed below a surface exclusion depth. Trace channels and apertures are formed into the catalytic laminate, electroless plated with a metal such as copper, filled with a conductive paste containing metallic particles, which are then melted to form traces. In a variation, multiple circuit board layers have channels formed into the surface below the exclusion depth, apertures formed, are electroless plated, and the channels and apertures filled with metal particles. Several such catalytic laminate layers are placed together and pressed together under elevated temperature until the catalytic laminate layers laminate together and metal particles form into traces for a multi-layer circuit board.

A method for forming a laminated structure of a touch panel, the method comprising: after forming a metal line and a bridge line, adding a metallization additive, and metallizing plating the metal line and the bridge line. The present invention is applied to a transparent conductive layer with bridge lines, metal lines, and T-bar. The metal line and the bridge line are fabricated in the same layer, which can reduce the processes and reduce the material cost, and the metallization plating after forming can reduce the stretching effects of the conductive material.