Patent classifications
H05K3/246
METHOD FOR MANUFACTURING WIRING BOARD
A method for manufacturing a wiring board in which the adhesion between an underlayer and a seed layer is improved. A diffusion layer in which an element forming the underlayer and an element forming a coating layer are mutually diffused is formed between the underlayer and a wiring portion of the coating layer by irradiating the wiring portion with a laser beam. A seed layer is formed by removing a portion excluding the wiring portion of the coating layer from the underlayer. A metal layer is formed by disposing a solid electrolyte membrane between an anode and the seed layer and applying voltage between the anode and the underlayer. An exposed portion without the seed layer of the underlayer is removed from an insulating substrate.
Thick print copper pastes for aluminum nitride substrates
The invention provides an electroconductive paste comprising 50-90 wt. % of copper particle, 0.5-10 wt. % of a glass frit, 0.1-5% wt. % of adhesion promoter, which is at least one selected member from the group consisting of cuprous oxide, titanium oxide, zirconium oxide, boron resinate, zirconium resinate, amorphous boron, lithium phosphate, bismuth oxide, aluminum oxide, and zinc oxide, and 5-20 wt. % of an organic vehicle. An article comprising an aluminum nitride substrate and electroconductive paste of the invention is also provided. A method of forming an electroconductive circuit comprising is also provided.
HYBRID PRINTED CIRCUIT ASSEMBLY WITH LOW DENSITY MAIN CORE AND EMBEDDED HIGH DENSITY CIRCUIT REGIONS
A high density region for a low density circuit. At least a first liquid dielectric layer is deposited on the first surface of a first circuitry layer. The dielectric layer is imaged to create plurality of first recesses. Surfaces of the first recesses are plated electro-lessly with a conductive material to form first conductive structures electrically coupled to, and extending generally perpendicular to, the first circuitry layer. A plating resist is applied. A conductive material is electro-plated to the first conductive structure to substantially fill the first recesses, and the plating resist is removed.
CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME
A method for manufacturing a circuit board with narrow conductive traces and narrow spaces between traces includes a base layer and two first wiring layers disposed on opposite surfaces of the base layer. Each first wiring layer includes a first bottom wiring and a first electroplated copper wiring. The first bottom wiring is formed on the base layer. The first bottom wiring includes a first end facing the base layer, a second end opposite to the first end, and a first sidewall connecting the first end and the second end. The first electroplated copper wiring covers the second end and the first sidewall of the first bottom wiring.
Light-emitting device
In a light-emitting device (30), a wiring pattern including conductor wirings (160, 165) and electrodes (170, 180) is formed on a substrate (110), and an Au layer (120) is formed on the wiring pattern.
Ink composition, method of metalizing surface and article obtainable
An ink composition is provided, a method of metalizing a surface of an insulation substrate and an article obtainable by the method are also provided. The ink composition may comprise a metal compound and an ink vehicle, the metal compound is at least one selected from a group consisting of a compound of formula I and a compound of formula II, TiO.sub.2-σ (I), M.sup.1M.sup.2.sub.pO.sub.q (II), 0.05≦σ<1.8, M.sup.1 is at least one element selected from a group consisting of groups 2, 9-12 of the periodic table according to IUPAC nomenclature, M.sup.2 is at least one element selected from a group consisting of groups 3-8, 10 and 13 of the periodic table according to IUPAC nomenclature, and 0<p≦2, and 0<q<4.
Wiring board and method for manufacturing same
A wiring board and a method for manufacturing the wiring board in which an initial Cu plated layer is formed by plating so as to cover the surface of a metallized layer and then the initial Cu plated layer is heated to be softened or melted. Copper in the softened or melted initial Cu plated layer enters into open pore portions of the metallized layer. In addition, during the heating, components of the metallized layer and components of the initial Cu plated layer are mutually thermally diffused. Consequently, when solidified later (that is, when the initial Cu plated layer becomes a lower Cu plated layer), the adhesiveness between the metallized layer and the lower Cu plated layer is improved due to, for example, an anchoring effect and a mutual thermal diffusion effect.
METHOD FOR PRODUCING WIRING SUBSTRATE
A seeded substrate is first prepared. The seeded substrate includes an insulation substrate having a main surface composed of a first region and a second region other than the first region, and a conductive seed layer provided on the first region. Subsequently, a conductive layer is formed on at least the second region to obtain a first treated substrate. An insulation layer is then formed on the first treated substrate. The seed layer is then exposed. A metal layer is then formed on the surface of the seed layer. Here, a voltage is applied between the anode and the seed layer while a solid electrolyte membrane containing a metal ion-containing solution being disposed between the second treated substrate and the anode, and the solid electrolyte membrane and the seed layer being pressed into contact with each other. Thereafter, the insulation layer and the conductive layer are removed.
PATTERNED CONDUCTIVE ARTICLE
A patterned conductive article 200 includes a substrate 210 including a unitary layer 210-1 and includes a micropattern of conductive traces 220 embedded at least partially in the unitary layer. Each conductive trace extends along a longitudinal direction (y-direction) of the conductive trace and includes a conductive seed layer 230 having a top major surface 232 and an opposite bottom major surface 234 in direct contact with the unitary layer; and a unitary conductive body 240 disposed on the top major surface of the conductive seed layer. The unitary conductive body and the conductive seed layer differ in at least one of composition or crystal morphology. The unitary conductive body has lateral sidewalls 242, 244 and at least a majority of a total area of the lateral sidewalls is in direct contact with the unitary layer.
Printed circuit nanofiber web manufacturing method
Provided is a method of manufacturing a printed circuit nano-fiber web. A method of manufacturing a printed circuit nano-fiber web according to an embodiment of the present invention includes (1) a step of electrospinning a spinning solution including a fiber-forming ingredient to manufacture a nano-fiber web; and (2) a step of forming a circuit pattern to coat an outer surface of nano-fiber included in a predetermined region on the nano-fiber web using an electroless plating method. According to the present invention, a circuit pattern-printed nano-fiber web having flexibility and resilience suitable for future smart devices may be realized. In addition, a circuit pattern may be densely formed to a uniform thickness on a flexible nano-fiber web using an electroless plating method, and the flexible nano-fiber web may include a plurality of pores. Accordingly, since the printed circuit nano-fiber web may satisfy waterproofness and air permeability characteristics, it can be used in various future industrial fields including medical devices, such as biopatches, and an electronic device, such as smart devices.