Patent classifications
H05K3/3452
PRINTED CIRCUIT BOARD AND ELECTRONIC DEVICE
A printed circuit board includes a first chip component, a second chip component, and a printed wiring board. The first chip component and the second chip component each has a length L2 in the longitudinal direction. A relationship of 0.894≤L2/L1≤1.120 is satisfied, where L1 represents a length of the first opening in the longitudinal direction. A relationship of 0.894≤L2/4≤1.120 is satisfied, where length L4 represents a length of the second opening in the longitudinal direction. A relationship of 0.183≤L.sub.OA/L.sub.iA≤50.309 is satisfied, where L.sub.iA represents a length of the first land in the longitudinal direction, and L.sub.OA represents a thickness of solder on an end surface of the first electrode. A relationship of 0.183≤L.sub.OB/L.sub.iB≤0.309 is satisfied, where L.sub.iB represents a length of the second land in the longitudinal direction, and L.sub.OB represents a thickness of solder on an end surface of the second electrode.
Circuit board
A circuit board includes a substrate, a plurality of contacts disposed on a surface of the substrate, and a solder mask. The contacts have a plurality of plating regions and a metal layer on the plating regions, and the plating regions have at least two different sizes. The solder mask covers the surface of the substrate and covers edges of the plating regions, in which topmost surfaces of the contacts are below a top surface of the solder mask, and a gap between the topmost surfaces of the contacts and the top surface of the solder mask is larger than 0 μm and is smaller than 5 μm.
Crosstalk, power supply noise and/or EMI reduction methods and apparatuses
Apparatuses and methods associated with shield lines, and/or complementary decoupling capacitors and/or electromagnetic absorbing materials are disclosed herein. In embodiments, an apparatus may include a substrate having a ground plane; and a first and a second transmission line disposed on the substrate. Further, the apparatus may include a shield line constituted with electromagnetic absorbing material disposed between the first and second transmission lines and not coupled with the ground plane. In embodiments, the substrate may further include a power plane having a plurality of edges and a plurality of spacing; a plurality of decoupling capacitors disposed on the power or ground plane; and electromagnetic absorbing materials adhered to the plurality of edges and disposed in the plurality of spacing. Other embodiments may be described and/or claimed.
PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME
A printed wiring board includes a laminated base material including a surface conductor layer, a conductor layer, an interlayer insulating layer interposed between the surface conductor layer and the conductor layer, and an internal bonding layer interposed between the interlayer insulating layer and the surface conductor layer and/or conductor layer, and a solder resist layer laminated on a surface of the laminated base material such that the solder resist layer is covering the surface conductor layer. The internal bonding layer has a surface in contact with the interlayer insulating layer such that the surface of the internal bonding layer has arithmetic average roughness Ra in a range of 100 nm or more and 300 nm or less, and the surface conductor layer has a surface on a solder resist layer side such that the surface of the surface conductor layer has arithmetic average roughness Ra of less than 100 nm.
PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME
A printed wiring board includes a laminated base material including an insulating layer and a conductor layer formed on the insulating layer, and a solder resist layer laminated on the laminated material and including photosensitive resin. The resist layer has surface portion and portion in contact with the laminated material, the conductor layer has pattern including conductor pads in contact with the resist layer such that the pads are positioned in openings in the resist layer, and the resist layer satisfies a first condition that a chemical species derived from a photopolymerization initiator has concentration higher in the portion in contact with the laminated material than concentration in the surface portion and/or a second condition that the chemical species derived from the initiator in the portion in contact with the laminated material has photopolymerization initiating ability higher than a chemical species derived from a photopolymerization initiator in the surface portion.
Forming sacrificial composite materials for package-on-package architectures and structures formed thereby
Methods of forming a microelectronic packaging structure are described. Those methods may include forming a solder paste comprising a sacrificial polymer on a substrate, curing the solder paste below a reflow temperature of the solder to form a solid composite hybrid bump on the conductive pads, forming a molding compound around the solid composite hybrid bump, and reflowing the hybrid bump, wherein the sacrificial polymer is substantially decomposed.
Preparation method for dry film solder resist and film laminate used therein
The present invention relates to a preparation method for a dry film solder resist (DFSR) capable of forming the DFSR having fine unevenness on a surface by a more simplified method, and a film laminate used therein. The preparation method for a dry film solder resist includes forming a predetermined photo-curable and heat-curable resin composition on a transparent carrier film having a surface on which a fine unevenness having an average roughness (Ra) of 200 nm to 2 μm is formed; laminating the resin composition on a substrate to form a laminated structure in which the substrate, the resin composition, and the transparent carrier film are sequentially formed; exposing the resin composition and delaminating the transparent carrier film; and alkaline-developing the resin composition in a non-exposure part and performing heat-curing.
USING WHITE LEDS TO ENHANCE INTENSITY OF COLORED LIGHT FROM COLORED LEDS
The present disclosure describes light systems in which the intensity of base color LEDs configured to emit light within a target color region is increased using additional white LEDs and the emitted light is filtered so that a dominant portion of light passing through the filter at a particular viewing angle is within the target color region. The present disclosure also describes methods for forming a printed circuit board with an integral heat sink arrangement by depositing additional solder on solder pads that are not used to connect electronic components so that the additional solder acts as a heat sink.
Surface pretreatment and drop spreading control on multi component surfaces
Methods, systems and produced printed substrates are provided, which include substrates composed of one or more materials which are treated by an intermediate layer for normalizing surface energies and a digitally printed formulation adapted to the normalized surface energies. Surface energy normalization may be carried out by physical processes or by selective chemical processes. In an example, a self-assembled monolayer is applied to the surface of a printed circuit board to control ink jet dots by reducing copper surface energy and to improve ink adhesion. The self-assembled monolayer binds via an α group selectively and covalently to the copper on the board and binds via a hydrophobic ω group to solder mask ink that is applied to the board. The ω group participates in the solidification process of the ink.
Printed circuit board and semiconductor package using the same
A printed circuit board (PCB) includes: a base substrate including a top surface including an electronic device mounting region; chip connection pads that are provided on the electronic device mounting region; a conductive pattern group that is provided on the top surface of the base substrate and includes an extended conductive pattern extending between two adjacent chip connection pads from among the chip connection pads, the extended conductive pattern being spaced apart from each of the two adjacent chip connection pads; and a solder resist layer that covers a part of the extended conductive pattern and is spaced apart from the chip connection pads.