A resin substrate includes an insulating base material including opposing first and second main surfaces, at least one of which is parallel or substantially parallel to each of an X-axis direction and a Y-axis direction. The insulating base material is divided into first and second sections arranged in the X-axis direction. The first section includes, when evenly divided into three in a Z-axis direction, a first region closest to the first main surface, a second region closest to the second main surface, and a third region between the first region and the second region. A degree of resin molecular orientation in the first region in the Y-axis direction is greater than a degree of resin molecular orientation in the second section of the insulating base material in the Y-axis direction.

A resin multilayer substrate includes a multilayer body including resin layers and adhesive layers that are laminated, via conductors in the resin layers, and bonding portions in the adhesive layers. The bonding portion is connected to the via conductor. One of the resin layer and the adhesive layer is a gas high-permeable layer having a higher gas permeability than the other one. The bonding portion includes an organic substance, or has a higher void content rate per unit plane sectional area than the via conductor. At least a portion of each of the bonding portions contacts the gas high-permeable layers.

High-speed interconnects for printed circuit boards and methods for forming the high-speed interconnects are described. A high-speed interconnect may comprise a region of a conductive film having a reduced surface roughness and one or more regions that have been treated for improved bonding with an adjacent insulating layer. Regions of reduced roughness may be used to carry high data rate signals within PCBs. Regions treated for bonding may include a roughened surface, adhesion-promoting chemical treatment, and/or material deposited to improve wettability of the surface and/or adhesion to a cured insulator.

A method may include forming a plurality of multilayer cores wherein each multilayer core comprises a sheet of cured dielectric material having a layer of metal on each side of the sheet of cured dielectric material, patterning each layer of metal in the plurality of multilayer cores to form wiring traces in each layer of metal, embedding a solder element in at least one sheet of a plurality of sheets of uncured dielectric material, wherein the solder element having a melting point temperature within a temperature range of a curing temperature of the uncured dielectric material, forming a printed circuit board by alternately stacking the plurality of multilayer cores with the plurality of sheets of uncured dielectric material between each multilayer core, laminating the stack of multilayer cores and sheets of uncured dielectric material to cause curing of the sheets of uncured dielectric material and melting of the solder element.

A catalytic resin is formed by mixing a resin and either homogeneous or heterogeneous catalytic particles, the resin infused into a woven glass fabric to form an A-stage pre-preg, the A-stage pre-preg cured into a B-stage pre-preg, thereafter held in a vacuum and between pressure plates at a gel point temperature for a duration of time sufficient for the catalytic particles to migrate away from the resin rich surfaces of the pre-preg, thereby forming a C-stage pre-preg after cooling. The C-stage pre-preg subsequently has trenches formed by removing the resin rich surface, the trenches extending into the depth of the catalytic particles, optionally including drilled holes to form vias, and the C-stage pre-preg with trenches and holes placed in an electroless bath, whereby traces form in the trenches and holes where the surface of the cured pre-preg has been removed.

A manufacturing method of a mounting structure includes: a step of preparing a mounting member including a first circuit member and a plurality of second circuit members placed on the first circuit member; a disposing step of disposing a thermosetting sheet and a thermoplastic sheet on the mounting member, with the thermosetting sheet interposed between the thermoplastic sheet and the first circuit member; a first sealing step of pressing a stack of the thermosetting sheet and the thermoplastic sheet against the first circuit member, and heating the stack, to seal the second circuit members and to cure the thermosetting sheet into a cured layer; and a removal step of removing the thermoplastic sheet from the cured layer. At least one of the second circuit members is a hollow member having a space from the first circuit member, and in the first sealing step, the second circuit members are sealed so as to maintain the space.

A resin multilayer substrate includes a stacked body including a first main surface, a cavity provided in the first main surface, and conductor patterns provided in the stacked body. The stacked body includes insulating substrate layers including resin as a main material that are stacked. The cavity includes a side surface and a bottom surface. At least a portion of a boundary between the side surface and the bottom surface includes conductor patterns continuous with the side surface and the bottom surface.

A circuit carrier board structure includes a first substrate, a second substrate, an adhesive layer, and a plurality of contact pads. The first substrate includes a first surface and a second surface, and also includes a plurality of first build-up layers sequentially stacked. The first build-up layers include a first dielectric layer and a first circuit layer. The second substrate includes a third surface and a fourth surface, and also includes a plurality of second build-up layers sequentially stacked. The second build-up layers include a second dielectric layer and a second circuit layer. The second surface is combined to the third surface. The connection pads are on the first surface and electrically connected to the first circuit layer. The first substrate is electrically connected to the second substrate. A manufacturing method of the circuit carrier board structure is also provided.

A multilayer substrate includes a laminate, first and second signal lines, first and second ground conductors, and interlayer connection conductors. The first and second signal lines extend along a transmission direction and include parallel extending portions that extend in parallel or substantially in parallel with each other. The first and second ground conductors sandwich the first and second signal lines in a laminating direction. The first and second ground conductors respectively include a first opening and a third opening between the signal lines when viewed from the laminating direction, and respectively include second openings and fourth openings disposed outside in a width direction orthogonal or substantially orthogonal to the transmission direction in the parallel extending portions when viewed from the laminating direction. The interlayer connection conductors are disposed in the transmission direction and at least between the signal lines.

A multilayer resin substrate includes a stacked body including resin layers stacked on each other, a first planar conductor on a resin layer, and an interlayer connection conductor on a resin layer. The interlayer connection conductor includes a first interlayer connection conductor connected to an external conductor, and a second interlayer connection conductor bonded to the first interlayer connection conductor and a planar conductor. The first and second interlayer connection conductors are made of different materials. The second interlayer connection conductor includes a constricted portion including a smaller planar cross-sectional area than a different portion, between a bonding portion to which the first interlayer connection conductor is bonded and a bonding portion to which the planar conductor is bonded.