A stacked body includes a first resin layer including a thermoplastic first resin as a main material, a pattern including a conductor layer on one principal surface of the first resin layer, and a second resin layer including a thermoplastic second resin as a main material. The first resin layer is softer than the second resin layer. The first resin layer has a lower dielectric constant than the second resin layer. A pattern including the conductor layer is at least partially embedded in the first resin layer, and includes a portion in contact with the first resin layer along a layer direction (X-Y plane) of the first resin layer and a portion in contact with the first resin layer along a stacking direction (X-Z plane) of the first resin layer, the second resin layer, and the pattern including the conductor layer.

An electronic component includes a first set comprising an interconnect layer and an electronic circuit having a front face and a back face, which is connected to the interconnect layer by the front face, wherein the first set comprises a metal plate having a front face and a back face joined to the back face of the electronic circuit; a coupling agent between the front face of the metal plate and the back face of the electronic circuit, configured to thermally and electrically connect the metal plate to the electronic circuit; and in that the electronic component comprises: one or more layers made of organic materials stacked around the first set and the metal plate using a printed circuit-type technique and encapsulating the electronic circuit; a thermally conductive metal surface arranged at least partially in contact with the back face of the metal plate.

A multilayer substrate includes a lamination body including a first resin substrate, a second resin substrate, and a bonding layer that are hot-pressed. A first conductor pattern including a surface defined by a plated film is disposed on a first surface of the first resin substrate. A second conductor pattern including a surface defined by a plated film is disposed on a second surface of the first resin substrate. A third conductor pattern including a surface defined by a plated film is disposed on a third surface of the second resin substrate. A fourth conductor pattern including a surface defined by a plated film is disposed on a fourth surface of the second resin substrate. The first conductor pattern is located closer to one outermost layer than the second conductor pattern is. The second conductor pattern is thinner than the first conductor pattern.

An electronic device includes a multilayer circuit board having a non-planar three-dimensional shape defining a membrane switch recess therein. The multilayer circuit board may include at least one liquid crystal polymer (LCP) layer, and at least one electrically conductive pattern layer thereon defining at least one membrane switch electrode adjacent the membrane switch recess to define a membrane switch. The electronic may further include a compressible dielectric material filling the membrane switch recess. The electronic device may also include at least one spring member within the membrane switch recess.

Integrated multilayer structure for hosting electronics, including a first substrateincluding organic, electrically substantially insulating natural material including and exhibiting a related naturally grown or natural textile based surface texture, said first substrate having a first side facing a predefined front side of the structure, said first side of the first substrate being optionally configured to face a user and/or use environment of the structure or of its host device, and an opposite second side, a plastic layer, optionally including thermoplastic or thermoset plastics, molded onto said second side of the first substrate so as to at least partially cover it, and circuitry provided on the second side of the first substrate, said circuitry being at least partially embedded in the molded material of the plastic layer. Related method of manufacture is presented.

A circuit carrier board structure includes a first substrate, a second substrate, an adhesive layer, and a plurality of contact pads. The first substrate includes a first surface and a second surface, and also includes a plurality of first build-up layers sequentially stacked. The first build-up layers include a first dielectric layer and a first circuit layer. The second substrate includes a third surface and a fourth surface, and also includes a plurality of second build-up layers sequentially stacked. The second build-up layers include a second dielectric layer and a second circuit layer. The second surface is combined to the third surface. The connection pads are on the first surface and electrically connected to the first circuit layer. The first substrate is electrically connected to the second substrate. A manufacturing method of the circuit carrier board structure is also provided.

A method for manufacturing of a hybrid component carrier includes providing a first layer structure having at least one electrically insulating layer and at least one electrically conductive layer and forming a second layer structure on the first layer structure wherein the second layer structure has at least a first layer and a second layer. The first layer structure has a first density of electrically conductive elements. The second layer structure has a second density of electrically conductive elements. The second density of electrically conductive elements is greater than the first density of electrically conductive elements. The forming of the second layer structure on the first layer structure includes forming the first layer of the second layer structure on the first layer structure and subsequently forming the second layer of the second layer structure on the first layer of the second layer structure.

A catalytic resin is formed by mixing a resin and either homogeneous or heterogeneous catalytic particles, the resin infused into a woven glass fabric to form an A-stage pre-preg, the A-stage pre-preg cured into a B-stage pre-preg, thereafter held in a vacuum and between pressure plates at a gel point temperature for a duration of time sufficient for the catalytic particles to migrate away from the resin rich surfaces of the pre-preg, thereby forming a C-stage pre-preg after cooling. The C-stage pre-preg subsequently has trenches formed by removing the resin rich surface, the trenches extending into the depth of the catalytic particles, optionally including drilled holes to form vias, and the C-stage pre-preg with trenches and holes placed in an electroless bath, whereby traces form in the trenches and holes where the surface of the cured pre-preg has been removed.

A manufacturing method of a mounting structure, the method including a step of preparing a mounting member including a first circuit member and a plurality of second circuit members placed on the first circuit member; a disposing step of disposing a thermosetting sheet and a thermoplastic sheet on the mounting member, with the thermosetting sheet interposed between the thermoplastic sheet and the first circuit member; a first sealing step of pressing a stack of the thermosetting sheet and the thermoplastic sheet against the first circuit member, and heating the stack, to seal the second circuit members and to cure the thermosetting sheet into a first cured layer; a removal step of removing the thermoplastic sheet from the first cured layer; and a coating film formation step of forming a coating film on the first cured layer, after the removal step. At least one of the second circuit members is a hollow member having a space from the first circuit member, and in the first sealing step, the second circuit members are sealed so as to maintain the space.

An antenna module includes: a dielectric substrate including a multilayer structure, the dielectric substrate having a first surface and a second surface, the second surface being opposite the first surface; an antenna pattern formed on the first surface side of the dielectric substrate; a RFIC provided on the second surface of the dielectric substrate, the RFIC supplying a radio frequency signal to the antenna pattern; and a power supply line that supplies power to the RFIC, wherein the thickness of the power supply line in the stacking direction (Z axis direction) of the dielectric substrate is thicker than the thickness of the antenna pattern in the stacking direction.