H05K3/4655

Method of making printed circuit board structure including a closed cavity with vias
11445620 · 2022-09-13 · ·

A method of making a printed circuit board structure including a closed cavity is provided. The method can include the steps of forming a cavity in a core structure of a core layer, laminating each of a top surface and a bottom surface of the core structure with an adhesive layer and a metal layer to prepare a laminate structure and cover the cavity to define a closed cavity. The method also includes forming vias through the laminate structure, and patterning the metal layers in the laminate structure.

Method for manufacturing multilayer printed wiring board

A first stack is formed by stacking a first sheet of metal foil, a first prepreg, and a second sheet of metal foil, one on top of another. The first prepreg is thermally cured by thermally pressing these members to make a double-sided metal-clad laminate. Conductor wiring is formed by partially removing the first sheet of metal foil from the double-sided metal-clad laminate to make a printed wiring board. After a third sheet of metal foil has been preheated, the conductor wiring of the printed wiring board, a second prepreg, and the third sheet of metal foil are stacked one on top of another and thermally pressed together. The first insulating layer has a lower linear expansion coefficient than any of the first sheet of metal foil or the second sheet of metal foil does.

Printed wiring board and method for manufacturing the same

In a printed wiring board, when a plurality of wiring base bodies are collectively stacked, a constituent material of a first layer of an insulating resin film has a low melting point, so that the first layer is easily melted. Therefore, thermal welding on an upper surface of the wiring base body is reliably performed, and the wiring base bodies are bonded to each other with high reliability.

METHOD FOR MAKING PRINTED WIRING BOARD, PRINTED WIRING BOARD, AND ADHESIVE FILM FOR MAKING PRINTED WIRING BOARD
20220304163 · 2022-09-22 · ·

By interposing a hard mask between a dielectric and photo-sensitive material it is possible to form fine via in the dielectric by dry etching without damaging the remaining surface of the dielectric.

Opposing Planar Electrically Conductive Surfaces Connected for Establishing a Two-Dimensional Electric Connection Area Between Component Carrier Stacks
20220248532 · 2022-08-04 ·

A component carrier includes a first stack having at least one first electrically insulating layer structure and at least one first electrically conductive layer structure, and a second stack with at least one second electrically insulating layer structure and at least one second electrically conductive layer structure. The first stack and the second stack are connected with each other so that a vertical two-dimensional electrically conductive connection is established. The first stack has a first cavity and the second stack has a second cavity, the first cavity and the second cavity being separated by at least one further electrically insulating layer structure. At least one of the first cavity and the second cavity is delimited by a wall being at least partially lined with an electrically conductive coating.

Wiring board and method for manufacturing the same
11277925 · 2022-03-15 · ·

A wiring board includes core substrate, a first build-up layer on first surface of the substrate and including conductive and insulating resin layers, and a second build-up layer on second surface of the substrate and including conductive and insulating resin layers. The first build-up is formed such that each conductive layer includes a metal foil layer and a plating layer on the foil layer and the foil layer of a conductive layer on an outermost resin layer has thickness greater than thickness of the foil layer of a conductive layer on a non-outermost resin layer, and the second build-up is formed such that each conductive layer includes a metal foil layer and a plating layer on the foil layer and the foil layer of a conductive layer on an outermost resin layer has thickness greater than thickness of the foil layer of a conductive layer on a non-outermost resin layer.

Multilayer laminate and method for producing multilayer printed wiring board using same

A multi-layered board includes: a middle conductive layer; a first dielectric layer that is disposed directly on a first surface of the middle conductive layer; a second dielectric layer that is disposed directly on a second surface of the middle conductive layer; a first outer surface conductive layer that is disposed directly on an outer side of the first dielectric layer; and a second outer surface conductive layer that is disposed directly on an outer side of the second dielectric layer. The first outer surface conductive layer serves as a first outer surface of the multi-layered board, and the second outer surface conductive layer serves as a second outer surface of the multi-layered board. The middle conductive layer is solidly formed over an entire planar direction of the multi-layered board. The first dielectric layer and the second dielectric layer each independently have a thickness variation of 15% or less.

PHENOXY RESIN, RESIN COMPOSITION INCLUDING SAME, CURED OBJECT OBTAINED THEREFROM, AND PRODUCTION METHOD THEREFOR

Provided are a phenoxy resin having excellent heat resistance, low hygroscopicity, and solvent solubility, a resin composition using the same, and a cured object obtained therefrom. The phenoxy resin is represented by Formula (1) below and has an Mw of 10,000 to 200,000:

##STR00001##

where, X represents a divalent group, and includes, essentially, a group having a cyclohexane ring structure and a group having a fluorene ring structure. Y represents a hydrogen atom or a glycidyl group. n is the number of repetitions and an average value thereof is 25 to 500.

Semi-flex component carrier with dielectric material having high elongation and low young modulus

A semi-flex component carrier includes a stack having at least one electrically insulating layer structure and/or at least one electrically conductive layer structure. The stack defines at least one rigid portion and at least one semi-flexible portion. The at least one electrically insulating layer structure forms at least part of the semi-flexible portion and includes a material having an elongation of larger than 3% and a Young modulus of less than 5 GPa.

Component Carrier With Low-Solvent Fiber-Free Dielectric Layer
20220078923 · 2022-03-10 ·

A method of manufacturing a component carrier is described. The method includes forming a stack with at least one electrically conductive layer structure and at least one electrically insulating layer structure, and reducing an amount of solvent in a fiber-free dielectric layer, which is directly connected to a metal layer, so that the dielectric layer with reduced amount of solvent remains at least partially uncured.